perf/arm_cspmu: Add PMEVFILT2R support

Architecturally we have two filters for each regular event counter,
so add generic support for the second one too.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Reviewed-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
Link: https://lore.kernel.org/r/b11be3f23a72bc27088b115099c8fe865b70babc.1741190362.git.robin.murphy@arm.com
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c b/drivers/perf/arm_cspmu/arm_cspmu.c
index 053bb7920df6e920644782fbe302a2a195c44562..efa9b229e7012ea218337b54fb2a86af867df1de 100644 (file)
--- a/drivers/perf/arm_cspmu/arm_cspmu.c
+++ b/drivers/perf/arm_cspmu/arm_cspmu.c
@@ -183,6 +183,7 @@ arm_cspmu_event_attr_is_visible(struct kobject *kobj,
 static struct attribute *arm_cspmu_format_attrs[] = {
        ARM_CSPMU_FORMAT_EVENT_ATTR,
        ARM_CSPMU_FORMAT_FILTER_ATTR,
+       ARM_CSPMU_FORMAT_FILTER2_ATTR,
        NULL,
 };
 
@@ -767,9 +768,11 @@ static void arm_cspmu_set_ev_filter(struct arm_cspmu *cspmu,
                                    const struct perf_event *event)
 {
        u32 filter = event->attr.config1 & ARM_CSPMU_FILTER_MASK;
-       u32 offset = PMEVFILTR + (4 * hwc->idx);
+       u32 filter2 = event->attr.config2 & ARM_CSPMU_FILTER_MASK;
+       u32 offset = 4 * event->hw.idx;
 
-       writel(filter, cspmu->base0 + offset);
+       writel(filter, cspmu->base0 + PMEVFILTR + offset);
+       writel(filter2, cspmu->base0 + PMEVFILT2R + offset);
 }
 
 static void arm_cspmu_set_cc_filter(struct arm_cspmu *cspmu,

diff --git a/drivers/perf/arm_cspmu/arm_cspmu.h b/drivers/perf/arm_cspmu/arm_cspmu.h
index d59040d6a7e39eb0fe8a95f53847be0073e84aa4..19684b76bd969b84b5a9815b92fb8c70f9ce1edc 100644 (file)
--- a/drivers/perf/arm_cspmu/arm_cspmu.h
+++ b/drivers/perf/arm_cspmu/arm_cspmu.h
@@ -47,6 +47,8 @@
 /* Default filter format */
 #define ARM_CSPMU_FORMAT_FILTER_ATTR   \
        ARM_CSPMU_FORMAT_ATTR(filter, "config1:0-31")
+#define ARM_CSPMU_FORMAT_FILTER2_ATTR  \
+       ARM_CSPMU_FORMAT_ATTR(filter2, "config2:0-31")
 
 /*
  * This is the default event number for cycle count, if supported, since the
@@ -72,6 +74,7 @@
 #define PMEVCNTR_HI                    0x4
 #define PMEVTYPER                      0x400
 #define PMCCFILTR                      0x47C
+#define PMEVFILT2R                     0x800
 #define PMEVFILTR                      0xA00
 #define PMCNTENSET                     0xC00
 #define PMCNTENCLR                     0xC20