]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
ARM: dts: rockchip: explicitly set vcc_sd0 pin to gpio on rk3188-radxarock
authorHeiko Stuebner <heiko@sntech.de>
Thu, 20 Sep 2018 09:34:36 +0000 (11:34 +0200)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 24 Sep 2018 13:48:29 +0000 (15:48 +0200)
It is good practice to make the setting of gpio-pinctrls explicitly in the
devicetree, and in this case even necessary.
Rockchip boards start with iomux settings set to gpio for most pins and
while the linux pinctrl driver also implicitly sets the gpio function if
a pin is requested as gpio that is not necessarily true for other drivers.

The issue in question stems from uboot, where the sdmmc_pwr pin is set
to function 1 (sdmmc-power) by the bootrom when reading the 1st-stage
loader. The regulator controlled by the pin is active-low though, so
when the dwmmc hw-block sets its enabled bit, it actually disables the
regulator. By changing the pin back to gpio we fix that behaviour.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm/boot/dts/rk3188-radxarock.dts

index 45fd2b302dda1d1c3c995149f2386c1d1db97af9..4a2890618f6fcf8d914eef78c4a027e1f70b3ac1 100644 (file)
@@ -93,6 +93,8 @@
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
                gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&sdmmc_pwr>;
                startup-delay-us = <100000>;
                vin-supply = <&vcc_io>;
        };
                };
        };
 
+       sd0 {
+               sdmmc_pwr: sdmmc-pwr {
+                       rockchip,pins = <RK_GPIO3 1 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        usb {
                host_vbus_drv: host-vbus-drv {
                        rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;