2_23-branch'.
Cherrypick from master 2012-10-29 09:25:15 UTC Alan Modra <amodra@gmail.com> ' * gas/cfi/cfi.exp: Remove redundant ppc test. Exclude':
gas/testsuite/gas/i386/arch-10-bdver3.d
gas/testsuite/gas/i386/nops-1-bdver3.d
gas/testsuite/gas/i386/x86-64-arch-2-bdver3.d
gas/testsuite/gas/i386/x86-64-nops-1-bdver3.d
gas/testsuite/gas/ppc/altivec2.d
gas/testsuite/gas/ppc/altivec2.s
gas/testsuite/gas/z8k/translate-ops.d
gas/testsuite/gas/z8k/translate-ops.s
ld/testsuite/ld-aarch64/tlsle-symbol-offset.d
ld/testsuite/ld-aarch64/tlsle-symbol-offset.s
--- /dev/null
+#source: arch-10.s
+#as: -march=bdver3+vmx+smx+movbe+ept+padlock
+#objdump: -dw
+#name: i386 arch 10 (bdver3)
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
+[ ]*[a-f0-9]+: 0f ae 38 clflush \(%eax\)
+[ ]*[a-f0-9]+: 0f 05 syscall
+[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
+[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
+[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 0f 37 getsec
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
+[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%ecx\),%xmm0
+[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
+[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%ecx\),%xmm0,%xmm2
+[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%ecx\),%ebx
+[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%ecx\),%ebx
+[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
+[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
+[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
+[ ]*[a-f0-9]+: 0f 01 da vmload
+[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
+[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
+[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
+[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
+[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
+#pass
--- /dev/null
+#as: -mtune=bdver3
+#source: nops-1.s
+#objdump: -drw
+#name: i386 -mtune=bdver3 nops 1
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <nop15>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%eax,%eax,1\)
+
+0+10 <nop14>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+
+0+20 <nop13>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+
+0+30 <nop12>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+40 <nop11>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%eax,%eax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+50 <nop10>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
+
+0+60 <nop9>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+70 <nop8>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%eax,%eax,1\)
+
+0+80 <nop7>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+
+0+90 <nop6>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+a0 <nop5>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%eax,%eax,1\)
+
+0+b0 <nop4>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
+
+0+c0 <nop3>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
+
+0+d0 <nop2>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax
+#pass
--- /dev/null
+#source: x86-64-arch-2.s
+#as: -march=bdver3+vmx+smx+movbe+ept+padlock
+#objdump: -dw
+#name: x86-64 arch 2 (bdver3)
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
+[ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
+[ ]*[a-f0-9]+: 0f 05 syscall
+[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
+[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
+[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 0f 37 getsec
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%rcx\)
+[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%rcx\),%xmm0
+[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
+[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%rcx\),%xmm0,%xmm2
+[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%rcx\),%ebx
+[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
+[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
+[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
+[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
+[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
+[ ]*[a-f0-9]+: 0f 01 da vmload
+[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
+[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
+[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
+[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
+#pass
--- /dev/null
+#as: -mtune=bdver3
+#source: nops-1.s
+#objdump: -drw
+#name: x86-64 -mtune=bdver3 nops 1
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <nop15>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+10 <nop14>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+
+0+20 <nop13>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+
+0+30 <nop12>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+40 <nop11>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+50 <nop10>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+60 <nop9>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+70 <nop8>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+80 <nop7>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+
+0+90 <nop6>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+a0 <nop5>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+b0 <nop4>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
+
+0+c0 <nop3>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
+
+0+d0 <nop2>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax
+#pass
--- /dev/null
+#as: -maltivec
+#objdump: -dr -Maltivec
+#name: Altivec ISA 2.07 instructions
+
+.*
+
+Disassembly of section \.text:
+
+0+00 <start>:
+ 0: (7c 60 e2 0e|0e e2 60 7c) lvepxl v3,0,r28
+ 4: (7e 64 92 0e|0e 92 64 7e) lvepxl v19,r4,r18
+ 8: (7f 60 9a 4e|4e 9a 60 7f) lvepx v27,0,r19
+ c: (7c 39 92 4e|4e 92 39 7c) lvepx v1,r25,r18
+ 10: (7f e0 da 0a|0a da e0 7f) lvexbx v31,0,r27
+ 14: (7f 81 62 0a|0a 62 81 7f) lvexbx v28,r1,r12
+ 18: (7f e0 72 4a|4a 72 e0 7f) lvexhx v31,0,r14
+ 1c: (7e 30 fa 4a|4a fa 30 7e) lvexhx v17,r16,r31
+ 20: (7e c0 ea 8a|8a ea c0 7e) lvexwx v22,0,r29
+ 24: (7e f9 2a 8a|8a 2a f9 7e) lvexwx v23,r25,r5
+ 28: (7c 60 66 0a|0a 66 60 7c) lvsm v3,0,r12
+ 2c: (7f 7d 0e 0a|0a 0e 7d 7f) lvsm v27,r29,r1
+ 30: (7c e0 36 ca|ca 36 e0 7c) lvswxl v7,0,r6
+ 34: (7c f0 46 ca|ca 46 f0 7c) lvswxl v7,r16,r8
+ 38: (7d c0 94 ca|ca 94 c0 7d) lvswx v14,0,r18
+ 3c: (7f 9c 84 ca|ca 84 9c 7f) lvswx v28,r28,r16
+ 40: (7f 60 66 8a|8a 66 60 7f) lvtlxl v27,0,r12
+ 44: (7f 7c 06 8a|8a 06 7c 7f) lvtlxl v27,r28,r0
+ 48: (7e e0 cc 8a|8a cc e0 7e) lvtlx v23,0,r25
+ 4c: (7c 39 74 8a|8a 74 39 7c) lvtlx v1,r25,r14
+ 50: (7e 80 c6 4a|4a c6 80 7e) lvtrxl v20,0,r24
+ 54: (7e dd c6 4a|4a c6 dd 7e) lvtrxl v22,r29,r24
+ 58: (7f 00 44 4a|4a 44 00 7f) lvtrx v24,0,r8
+ 5c: (7d b7 e4 4a|4a e4 b7 7d) lvtrx v13,r23,r28
+ 60: (7d 9c 60 dc|dc 60 9c 7d) mvidsplt v12,r28,r12
+ 64: (7d 5b 00 5c|5c 00 5b 7d) mviwsplt v10,r27,r0
+ 68: (7f 60 6e 0e|0e 6e 60 7f) stvepxl v27,0,r13
+ 6c: (7c 42 fe 0e|0e fe 42 7c) stvepxl v2,r2,r31
+ 70: (7c 60 56 4e|4e 56 60 7c) stvepx v3,0,r10
+ 74: (7f 7c 06 4e|4e 06 7c 7f) stvepx v27,r28,r0
+ 78: (7d a0 33 0a|0a 33 a0 7d) stvexbx v13,0,r6
+ 7c: (7d b9 1b 0a|0a 1b b9 7d) stvexbx v13,r25,r3
+ 80: (7e c0 0b 4a|4a 0b c0 7e) stvexhx v22,0,r1
+ 84: (7e 2e 53 4a|4a 53 2e 7e) stvexhx v17,r14,r10
+ 88: (7e a0 db 8a|8a db a0 7e) stvexwx v21,0,r27
+ 8c: (7f f2 0b 8a|8a 0b f2 7f) stvexwx v31,r18,r1
+ 90: (7f 40 6f 8a|8a 6f 40 7f) stvflxl v26,0,r13
+ 94: (7e cd af 8a|8a af cd 7e) stvflxl v22,r13,r21
+ 98: (7c a0 4d 8a|8a 4d a0 7c) stvflx v5,0,r9
+ 9c: (7e b8 0d 8a|8a 0d b8 7e) stvflx v21,r24,r1
+ a0: (7d a0 57 4a|4a 57 a0 7d) stvfrxl v13,0,r10
+ a4: (7d b1 cf 4a|4a cf b1 7d) stvfrxl v13,r17,r25
+ a8: (7e 20 55 4a|4a 55 20 7e) stvfrx v17,0,r10
+ ac: (7d 0c fd 4a|4a fd 0c 7d) stvfrx v8,r12,r31
+ b0: (7e 40 ef ca|ca ef 40 7e) stvswxl v18,0,r29
+ b4: (7f 4e 47 ca|ca 47 4e 7f) stvswxl v26,r14,r8
+ b8: (7c 00 7d ca|ca 7d 00 7c) stvswx v0,0,r15
+ bc: (7d b7 3d ca|ca 3d b7 7d) stvswx v13,r23,r7
+ c0: (10 d1 84 03|03 84 d1 10) vabsdub v6,v17,v16
+ c4: (12 b2 24 43|43 24 b2 12) vabsduh v21,v18,v4
+ c8: (13 34 4c 83|83 4c 34 13) vabsduw v25,v20,v9
+#pass
--- /dev/null
+start:
+ lvepxl 3,0,28
+ lvepxl 19,4,18
+ lvepx 27,0,19
+ lvepx 1,25,18
+ lvexbx 31,0,27
+ lvexbx 28,1,12
+ lvexhx 31,0,14
+ lvexhx 17,16,31
+ lvexwx 22,0,29
+ lvexwx 23,25,5
+ lvsm 3,0,12
+ lvsm 27,29,1
+ lvswxl 7,0,6
+ lvswxl 7,16,8
+ lvswx 14,0,18
+ lvswx 28,28,16
+ lvtlxl 27,0,12
+ lvtlxl 27,28,0
+ lvtlx 23,0,25
+ lvtlx 1,25,14
+ lvtrxl 20,0,24
+ lvtrxl 22,29,24
+ lvtrx 24,0,8
+ lvtrx 13,23,28
+ mvidsplt 12,28,12
+ mviwsplt 10,27,0
+ stvepxl 27,0,13
+ stvepxl 2,2,31
+ stvepx 3,0,10
+ stvepx 27,28,0
+ stvexbx 13,0,6
+ stvexbx 13,25,3
+ stvexhx 22,0,1
+ stvexhx 17,14,10
+ stvexwx 21,0,27
+ stvexwx 31,18,1
+ stvflxl 26,0,13
+ stvflxl 22,13,21
+ stvflx 5,0,9
+ stvflx 21,24,1
+ stvfrxl 13,0,10
+ stvfrxl 13,17,25
+ stvfrx 17,0,10
+ stvfrx 8,12,31
+ stvswxl 18,0,29
+ stvswxl 26,14,8
+ stvswx 0,0,15
+ stvswx 13,23,7
+ vabsdub 6,17,16
+ vabsduh 21,18,4
+ vabsduw 25,20,9
--- /dev/null
+#as:
+#objdump: -dr
+#name: translate-ops
+
+.*: +file format coff-z8k
+
+Disassembly of section \.text:
+
+0*00000000 <\.text>:
+ 0: b828 0640 trdb @rr2,@rr4,r6
+ 4: b82c 0640 trdrb @rr2,@rr4,r6
+ 8: b8c0 07a0 trib @rr12,@rr10,r7
+ c: b8c4 08a0 trirb @rr12,@rr10,r8
+ 10: b86a 0a80 trtdb @rr6,@rr8,r10
+ 14: b88e 034e trtdrb @rr8,@rr4,r3
+ 18: b8a2 0c20 trtib @rr10,@rr2,r12
+ 1c: b826 064e trtirb @rr2,@rr4,r6
--- /dev/null
+! translate opcodes
+
+ .text
+ .z8001
+
+ trdb @rr2,@rr4,r6
+ trdrb @rr2,@rr4,r6
+ trib @rr12,@rr10,r7
+ trirb @rr12,@rr10,r8
+ trtdb @rr6,@rr8,r10
+ trtdrb @rr8,@rr4,r3
+ trtib @rr10,@rr2,r12
+ trtirb @rr2,@rr4,r6
+
+ .end
--- /dev/null
+#source: tlsle-symbol-offset.s
+#ld: -shared -T relocs.ld -e0
+#objdump: -dr
+#...
+Disassembly of section .text:
+
+0000000000010000 <.text>:
+ +10000: d53bd040 mrs x0, tpidr_el0
+ +10004: 91400400 add x0, x0, #0x1, lsl #12
+ +10008: 91010000 add x0, x0, #0x40
+ +1000c: d65f03c0 ret
--- /dev/null
+ .global p
+ .global a
+ .section .tbss,"awT",%nobits
+p:
+ .zero 4096
+a:
+ .zero 52
+
+ .text
+
+# Compute the address of an integer within structure a, padded
+# by an array of size 48
+
+ mrs x0, tpidr_el0
+ add x0, x0, #:tprel_hi12:a+48
+ add x0, x0, #:tprel_lo12_nc:a+48
+ ret