+++ /dev/null
-From 452f360ea80f4b96305c7784d3af7cdc384dc95f Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Wed, 31 Jan 2024 12:37:32 +0530
-Subject: arm64: dts: qcom: sm6125: Fix UFS PHY clocks
-
-From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-
-[ Upstream commit 3823a877f25baa152e34325818d5140990d6464f ]
-
-QMP PHY used in SM6125 requires 3 clocks:
-
-* ref - 19.2MHz reference clock from RPM
-* ref_aux - Auxiliary reference clock from GCC
-* qref - QREF clock from GCC
-
-Fixes: f8399e8a2f80 ("arm64: dts: qcom: sm6125: Add UFS nodes")
-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
-Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-9-58a49d2f4605@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sm6125.dtsi | 8 +++++---
- 1 file changed, 5 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
-index 07081088ba146..9ff7b067f1e9d 100644
---- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
-@@ -792,10 +792,12 @@ ufs_mem_phy: phy@4807000 {
- compatible = "qcom,sm6125-qmp-ufs-phy";
- reg = <0x04807000 0xdb8>;
-
-- clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
-- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
-+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
-+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
-+ <&gcc GCC_UFS_MEM_CLKREF_CLK>;
- clock-names = "ref",
-- "ref_aux";
-+ "ref_aux",
-+ "qref";
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
---
-2.43.0
-
arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-qcm2290-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-sm6115-declare-vls-clamp-register-for.patch
-arm64-dts-qcom-sm6125-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm6350-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8150-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8150-fix-ufs-phy-clocks.patch
+++ /dev/null
-From a42ba778589dc025570fa4ef0183c51a9b4d4601 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Wed, 31 Jan 2024 12:37:32 +0530
-Subject: arm64: dts: qcom: sm6125: Fix UFS PHY clocks
-
-From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-
-[ Upstream commit 3823a877f25baa152e34325818d5140990d6464f ]
-
-QMP PHY used in SM6125 requires 3 clocks:
-
-* ref - 19.2MHz reference clock from RPM
-* ref_aux - Auxiliary reference clock from GCC
-* qref - QREF clock from GCC
-
-Fixes: f8399e8a2f80 ("arm64: dts: qcom: sm6125: Add UFS nodes")
-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
-Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-9-58a49d2f4605@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sm6125.dtsi | 8 +++++---
- 1 file changed, 5 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
-index 1dd3a4056e26f..e180f7c6e8c93 100644
---- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
-@@ -812,10 +812,12 @@ ufs_mem_phy: phy@4807000 {
- compatible = "qcom,sm6125-qmp-ufs-phy";
- reg = <0x04807000 0xdb8>;
-
-- clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
-- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
-+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
-+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
-+ <&gcc GCC_UFS_MEM_CLKREF_CLK>;
- clock-names = "ref",
-- "ref_aux";
-+ "ref_aux",
-+ "qref";
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
---
-2.43.0
-
arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-qcm2290-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-sm6115-declare-vls-clamp-register-for.patch
-arm64-dts-qcom-sm6125-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm6350-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8150-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8150-fix-ufs-phy-clocks.patch
+++ /dev/null
-From 4a649dc5fa5c78a69eb53b0de015c49e647ab62e Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Wed, 31 Jan 2024 12:37:32 +0530
-Subject: arm64: dts: qcom: sm6125: Fix UFS PHY clocks
-
-From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-
-[ Upstream commit 3823a877f25baa152e34325818d5140990d6464f ]
-
-QMP PHY used in SM6125 requires 3 clocks:
-
-* ref - 19.2MHz reference clock from RPM
-* ref_aux - Auxiliary reference clock from GCC
-* qref - QREF clock from GCC
-
-Fixes: f8399e8a2f80 ("arm64: dts: qcom: sm6125: Add UFS nodes")
-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
-Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-9-58a49d2f4605@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sm6125.dtsi | 8 +++++---
- 1 file changed, 5 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
-index 1dd3a4056e26f..e180f7c6e8c93 100644
---- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
-@@ -812,10 +812,12 @@ ufs_mem_phy: phy@4807000 {
- compatible = "qcom,sm6125-qmp-ufs-phy";
- reg = <0x04807000 0xdb8>;
-
-- clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
-- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
-+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
-+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
-+ <&gcc GCC_UFS_MEM_CLKREF_CLK>;
- clock-names = "ref",
-- "ref_aux";
-+ "ref_aux",
-+ "qref";
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
---
-2.43.0
-
arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-qcm2290-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-sm6115-declare-vls-clamp-register-for.patch
-arm64-dts-qcom-sm6125-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm6350-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8150-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch