]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
5.10-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 15 Feb 2021 14:35:08 +0000 (15:35 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 15 Feb 2021 14:35:08 +0000 (15:35 +0100)
added patches:
arm64-mte-allow-ptrace_peekmtetags-access-to-the-zero-page.patch
scripts-set-proper-openssl-include-dir-also-for-sign-file.patch
x86-pci-create-pci-msi-irqdomain-after-x86_init.pci.arch_init.patch

queue-5.10/arm64-mte-allow-ptrace_peekmtetags-access-to-the-zero-page.patch [new file with mode: 0644]
queue-5.10/scripts-set-proper-openssl-include-dir-also-for-sign-file.patch [new file with mode: 0644]
queue-5.10/series
queue-5.10/x86-pci-create-pci-msi-irqdomain-after-x86_init.pci.arch_init.patch [new file with mode: 0644]

diff --git a/queue-5.10/arm64-mte-allow-ptrace_peekmtetags-access-to-the-zero-page.patch b/queue-5.10/arm64-mte-allow-ptrace_peekmtetags-access-to-the-zero-page.patch
new file mode 100644 (file)
index 0000000..3f65b88
--- /dev/null
@@ -0,0 +1,75 @@
+From 68d54ceeec0e5fee4fb8048e6a04c193f32525ca Mon Sep 17 00:00:00 2001
+From: Catalin Marinas <catalin.marinas@arm.com>
+Date: Wed, 10 Feb 2021 18:03:16 +0000
+Subject: arm64: mte: Allow PTRACE_PEEKMTETAGS access to the zero page
+
+From: Catalin Marinas <catalin.marinas@arm.com>
+
+commit 68d54ceeec0e5fee4fb8048e6a04c193f32525ca upstream.
+
+The ptrace(PTRACE_PEEKMTETAGS) implementation checks whether the user
+page has valid tags (mapped with PROT_MTE) by testing the PG_mte_tagged
+page flag. If this bit is cleared, ptrace(PTRACE_PEEKMTETAGS) returns
+-EIO.
+
+A newly created (PROT_MTE) mapping points to the zero page which had its
+tags zeroed during cpu_enable_mte(). If there were no prior writes to
+this mapping, ptrace(PTRACE_PEEKMTETAGS) fails with -EIO since the zero
+page does not have the PG_mte_tagged flag set.
+
+Set PG_mte_tagged on the zero page when its tags are cleared during
+boot. In addition, to avoid ptrace(PTRACE_PEEKMTETAGS) succeeding on
+!PROT_MTE mappings pointing to the zero page, change the
+__access_remote_tags() check to (vm_flags & VM_MTE) instead of
+PG_mte_tagged.
+
+Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
+Fixes: 34bfeea4a9e9 ("arm64: mte: Clear the tags when a page is mapped in user-space with PROT_MTE")
+Cc: <stable@vger.kernel.org> # 5.10.x
+Cc: Will Deacon <will@kernel.org>
+Reported-by: Luis Machado <luis.machado@linaro.org>
+Tested-by: Luis Machado <luis.machado@linaro.org>
+Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
+Link: https://lore.kernel.org/r/20210210180316.23654-1-catalin.marinas@arm.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/kernel/cpufeature.c |    6 +-----
+ arch/arm64/kernel/mte.c        |    3 ++-
+ 2 files changed, 3 insertions(+), 6 deletions(-)
+
+--- a/arch/arm64/kernel/cpufeature.c
++++ b/arch/arm64/kernel/cpufeature.c
+@@ -1696,16 +1696,12 @@ static void bti_enable(const struct arm6
+ #ifdef CONFIG_ARM64_MTE
+ static void cpu_enable_mte(struct arm64_cpu_capabilities const *cap)
+ {
+-      static bool cleared_zero_page = false;
+-
+       /*
+        * Clear the tags in the zero page. This needs to be done via the
+        * linear map which has the Tagged attribute.
+        */
+-      if (!cleared_zero_page) {
+-              cleared_zero_page = true;
++      if (!test_and_set_bit(PG_mte_tagged, &ZERO_PAGE(0)->flags))
+               mte_clear_page_tags(lm_alias(empty_zero_page));
+-      }
+ }
+ #endif /* CONFIG_ARM64_MTE */
+--- a/arch/arm64/kernel/mte.c
++++ b/arch/arm64/kernel/mte.c
+@@ -239,11 +239,12 @@ static int __access_remote_tags(struct m
+                * would cause the existing tags to be cleared if the page
+                * was never mapped with PROT_MTE.
+                */
+-              if (!test_bit(PG_mte_tagged, &page->flags)) {
++              if (!(vma->vm_flags & VM_MTE)) {
+                       ret = -EOPNOTSUPP;
+                       put_page(page);
+                       break;
+               }
++              WARN_ON_ONCE(!test_bit(PG_mte_tagged, &page->flags));
+               /* limit access to the end of the page */
+               offset = offset_in_page(addr);
diff --git a/queue-5.10/scripts-set-proper-openssl-include-dir-also-for-sign-file.patch b/queue-5.10/scripts-set-proper-openssl-include-dir-also-for-sign-file.patch
new file mode 100644 (file)
index 0000000..c604fcf
--- /dev/null
@@ -0,0 +1,28 @@
+From fe968c41ac4f4ec9ffe3c4cf16b72285f5e9674f Mon Sep 17 00:00:00 2001
+From: Rolf Eike Beer <eb@emlix.com>
+Date: Fri, 12 Feb 2021 08:22:27 +0100
+Subject: scripts: set proper OpenSSL include dir also for sign-file
+
+From: Rolf Eike Beer <eb@emlix.com>
+
+commit fe968c41ac4f4ec9ffe3c4cf16b72285f5e9674f upstream.
+
+Fixes: 2cea4a7a1885 ("scripts: use pkg-config to locate libcrypto")
+Signed-off-by: Rolf Eike Beer <eb@emlix.com>
+Cc: stable@vger.kernel.org # 5.6.x
+Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ scripts/Makefile |    1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/scripts/Makefile
++++ b/scripts/Makefile
+@@ -17,6 +17,7 @@ hostprogs-always-$(CONFIG_SYSTEM_EXTRA_C
+ HOSTCFLAGS_sorttable.o = -I$(srctree)/tools/include
+ HOSTCFLAGS_asn1_compiler.o = -I$(srctree)/include
++HOSTCFLAGS_sign-file.o = $(CRYPTO_CFLAGS)
+ HOSTLDLIBS_sign-file = $(CRYPTO_LIBS)
+ HOSTCFLAGS_extract-cert.o = $(CRYPTO_CFLAGS)
+ HOSTLDLIBS_extract-cert = $(CRYPTO_LIBS)
index 4348748bf1e733061953bb0a4d3875050cb28eaa..df10a43b20139f7eab5c4cbd15b3abb1954e8d70 100644 (file)
@@ -81,3 +81,6 @@ drm-sun4i-dw-hdmi-fix-max.-frequency-for-h6.patch
 clk-sunxi-ng-mp-fix-parent-rate-change-flag-check.patch
 i2c-stm32f7-fix-configuration-of-the-digital-filter.patch
 h8300-fix-preemption-build-ti_pre_count-undefined.patch
+scripts-set-proper-openssl-include-dir-also-for-sign-file.patch
+x86-pci-create-pci-msi-irqdomain-after-x86_init.pci.arch_init.patch
+arm64-mte-allow-ptrace_peekmtetags-access-to-the-zero-page.patch
diff --git a/queue-5.10/x86-pci-create-pci-msi-irqdomain-after-x86_init.pci.arch_init.patch b/queue-5.10/x86-pci-create-pci-msi-irqdomain-after-x86_init.pci.arch_init.patch
new file mode 100644 (file)
index 0000000..474f7fa
--- /dev/null
@@ -0,0 +1,61 @@
+From 70245f86c109e0eafb92ea9653184c0e44b4b35c Mon Sep 17 00:00:00 2001
+From: Thomas Gleixner <tglx@linutronix.de>
+Date: Wed, 10 Feb 2021 16:27:41 +0100
+Subject: x86/pci: Create PCI/MSI irqdomain after x86_init.pci.arch_init()
+
+From: Thomas Gleixner <tglx@linutronix.de>
+
+commit 70245f86c109e0eafb92ea9653184c0e44b4b35c upstream.
+
+Invoking x86_init.irqs.create_pci_msi_domain() before
+x86_init.pci.arch_init() breaks XEN PV.
+
+The XEN_PV specific pci.arch_init() function overrides the default
+create_pci_msi_domain() which is obviously too late.
+
+As a consequence the XEN PV PCI/MSI allocation goes through the native
+path which runs out of vectors and causes malfunction.
+
+Invoke it after x86_init.pci.arch_init().
+
+Fixes: 6b15ffa07dc3 ("x86/irq: Initialize PCI/MSI domain at PCI init time")
+Reported-by: Juergen Gross <jgross@suse.com>
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Tested-by: Juergen Gross <jgross@suse.com>
+Cc: stable@vger.kernel.org
+Link: https://lore.kernel.org/r/87pn18djte.fsf@nanos.tec.linutronix.de
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/pci/init.c |   15 +++++++++++----
+ 1 file changed, 11 insertions(+), 4 deletions(-)
+
+--- a/arch/x86/pci/init.c
++++ b/arch/x86/pci/init.c
+@@ -9,16 +9,23 @@
+    in the right sequence from here. */
+ static __init int pci_arch_init(void)
+ {
+-      int type;
+-
+-      x86_create_pci_msi_domain();
++      int type, pcbios = 1;
+       type = pci_direct_probe();
+       if (!(pci_probe & PCI_PROBE_NOEARLY))
+               pci_mmcfg_early_init();
+-      if (x86_init.pci.arch_init && !x86_init.pci.arch_init())
++      if (x86_init.pci.arch_init)
++              pcbios = x86_init.pci.arch_init();
++
++      /*
++       * Must happen after x86_init.pci.arch_init(). Xen sets up the
++       * x86_init.irqs.create_pci_msi_domain there.
++       */
++      x86_create_pci_msi_domain();
++
++      if (!pcbios)
+               return 0;
+       pci_pcbios_init();