]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amd/pm: check pmfw eeprom feature bit
authorGangliang Xie <ganglxie@amd.com>
Wed, 22 Oct 2025 02:36:40 +0000 (10:36 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 6 Nov 2025 14:56:19 +0000 (09:56 -0500)
get and check the pmfw eeprom feature bit to
decide if pmfw eeprom is supported

Signed-off-by: Gangliang Xie <ganglxie@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_12_pmfw.h
drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h

index bf6aa9620911bc3b3aa36d208fd0ffc993e6b207..fa43d2e229a097de8d9a27cf21b4ee357949b560 100644 (file)
@@ -87,7 +87,7 @@ typedef enum {
 /*37*/  FEATURE_DVO                         = 37,
 /*38*/  FEATURE_XVMINORPSM_CLKSTOP_DS       = 38,
 /*39*/  FEATURE_GLOBAL_DPM                  = 39,
-/*40*/  FEATURE_NODE_POWER_MANAGER          = 40,
+/*40*/  FEATURE_HROM_EN                     = 40,
 
 /*41*/  NUM_FEATURES                        = 41
 } FEATURE_LIST_e;
index 9315ce49b396912d1d0fac29351dbaf602712e9e..3a3930ef7ed9b10e03d9c9b55c3672f377992a6f 100644 (file)
@@ -465,7 +465,8 @@ enum smu_clk_type {
        __SMU_DUMMY_MAP(GFX_EDC_XVMIN),                         \
        __SMU_DUMMY_MAP(GFX_DIDT_XVMIN),                                \
        __SMU_DUMMY_MAP(FAN_ABNORMAL),                          \
-       __SMU_DUMMY_MAP(PIT),
+       __SMU_DUMMY_MAP(PIT),                           \
+       __SMU_DUMMY_MAP(HROM_EN),
 
 #undef __SMU_DUMMY_MAP
 #define __SMU_DUMMY_MAP(feature)       SMU_FEATURE_##feature##_BIT
index 24aaef1494a468ac80f483e5dfc4f93e0cae223b..0ce8cff27bf9474d0af1225366d34d0edc56a904 100644 (file)
@@ -82,6 +82,7 @@ const struct cmn2asic_mapping smu_v13_0_12_feature_mask_map[SMU_FEATURE_COUNT] =
        SMU_13_0_12_FEA_MAP(SMU_FEATURE_DS_MPIOCLK_BIT,                 FEATURE_DS_MPIOCLK),
        SMU_13_0_12_FEA_MAP(SMU_FEATURE_DS_MP0CLK_BIT,                  FEATURE_DS_MP0CLK),
        SMU_13_0_12_FEA_MAP(SMU_FEATURE_PIT_BIT,                        FEATURE_PIT),
+       SMU_13_0_12_FEA_MAP(SMU_FEATURE_HROM_EN_BIT,                    FEATURE_HROM_EN),
 };
 
 const struct cmn2asic_msg_mapping smu_v13_0_12_message_map[SMU_MSG_MAX_COUNT] = {
@@ -1044,10 +1045,16 @@ static const struct ras_eeprom_smu_funcs smu_v13_0_12_eeprom_smu_funcs = {
 
 static void smu_v13_0_12_ras_smu_feature_flags(struct amdgpu_device *adev, uint64_t *flags)
 {
+       struct smu_context *smu = adev->powerplay.pp_handle;
+
        if (!flags)
                return;
 
        *flags = 0ULL;
+
+       if (smu_v13_0_6_cap_supported(smu, SMU_CAP(RAS_EEPROM)))
+               *flags |= RAS_SMU_FEATURE_BIT__RAS_EEPROM;
+
 }
 
 const struct ras_smu_drv smu_v13_0_12_ras_smu_drv = {
index 095f54b7e9e6253cadfdf290e290c202a9c19694..31bdaabbd59c074f70d3ada280c5819fa0bead16 100644 (file)
@@ -3913,6 +3913,9 @@ static int smu_v13_0_6_get_ras_smu_drv(struct smu_context *smu, const struct ras
        if (amdgpu_sriov_vf(smu->adev))
                return -EOPNOTSUPP;
 
+       if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_HROM_EN_BIT))
+               smu_v13_0_6_cap_set(smu, SMU_CAP(RAS_EEPROM));
+
        switch (amdgpu_ip_version(smu->adev, MP1_HWIP, 0)) {
        case IP_VERSION(13, 0, 12):
                *ras_smu_drv = &smu_v13_0_12_ras_smu_drv;
index ecec7af8a64f9180898038cd432dd28e2fc5a07a..367102cdbf0932e96829947dedbd3035646253e2 100644 (file)
@@ -72,6 +72,7 @@ enum smu_v13_0_6_caps {
        SMU_CAP(PLDM_VERSION),
        SMU_CAP(TEMP_METRICS),
        SMU_CAP(NPM_METRICS),
+       SMU_CAP(RAS_EEPROM),
        SMU_CAP(ALL),
 };