]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
4.8-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 21 Nov 2016 13:11:45 +0000 (14:11 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 21 Nov 2016 13:11:45 +0000 (14:11 +0100)
added patches:
crypto-caam-do-not-register-aes-xts-mode-on-lp-units.patch
drm-amdgpu-attach-exclusive-fence-to-prime-exported-bo-s.-v5.patch
drm-i915-assume-non-dp-port-if-dvo_port-is-hdmi-and-there-s-no-aux-ch-specified-in-the-vbt.patch
drm-i915-refresh-that-status-of-mst-capable-connectors-in-detect.patch
powerpc-64-fix-setting-of-ail-in-hypervisor-mode.patch
virtio-net-drop-legacy-features-in-virtio-1-mode.patch

queue-4.8/crypto-caam-do-not-register-aes-xts-mode-on-lp-units.patch [new file with mode: 0644]
queue-4.8/drm-amdgpu-attach-exclusive-fence-to-prime-exported-bo-s.-v5.patch [new file with mode: 0644]
queue-4.8/drm-i915-assume-non-dp-port-if-dvo_port-is-hdmi-and-there-s-no-aux-ch-specified-in-the-vbt.patch [new file with mode: 0644]
queue-4.8/drm-i915-refresh-that-status-of-mst-capable-connectors-in-detect.patch [new file with mode: 0644]
queue-4.8/powerpc-64-fix-setting-of-ail-in-hypervisor-mode.patch [new file with mode: 0644]
queue-4.8/series
queue-4.8/virtio-net-drop-legacy-features-in-virtio-1-mode.patch [new file with mode: 0644]

diff --git a/queue-4.8/crypto-caam-do-not-register-aes-xts-mode-on-lp-units.patch b/queue-4.8/crypto-caam-do-not-register-aes-xts-mode-on-lp-units.patch
new file mode 100644 (file)
index 0000000..46fe1fc
--- /dev/null
@@ -0,0 +1,48 @@
+From 83d2c9a9c17b1e9f23a3a0c24c03cd18e4b02520 Mon Sep 17 00:00:00 2001
+From: Sven Ebenfeld <sven.ebenfeld@gmail.com>
+Date: Mon, 7 Nov 2016 18:51:34 +0100
+Subject: crypto: caam - do not register AES-XTS mode on LP units
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Sven Ebenfeld <sven.ebenfeld@gmail.com>
+
+commit 83d2c9a9c17b1e9f23a3a0c24c03cd18e4b02520 upstream.
+
+When using AES-XTS on a Wandboard, we receive a Mode error:
+caam_jr 2102000.jr1: 20001311: CCB: desc idx 19: AES: Mode error.
+
+According to the Security Reference Manual, the Low Power AES units
+of the i.MX6 do not support the XTS mode. Therefore we must not
+register XTS implementations in the Crypto API.
+
+Signed-off-by: Sven Ebenfeld <sven.ebenfeld@gmail.com>
+Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+Fixes: c6415a6016bf "crypto: caam - add support for acipher xts(aes)"
+Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+
+---
+ drivers/crypto/caam/caamalg.c |    9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+--- a/drivers/crypto/caam/caamalg.c
++++ b/drivers/crypto/caam/caamalg.c
+@@ -4542,6 +4542,15 @@ static int __init caam_algapi_init(void)
+               if (!aes_inst && (alg_sel == OP_ALG_ALGSEL_AES))
+                               continue;
++              /*
++               * Check support for AES modes not available
++               * on LP devices.
++               */
++              if ((cha_vid & CHA_ID_LS_AES_MASK) == CHA_ID_LS_AES_LP)
++                      if ((alg->class1_alg_type & OP_ALG_AAI_MASK) ==
++                           OP_ALG_AAI_XTS)
++                              continue;
++
+               t_alg = caam_alg_alloc(alg);
+               if (IS_ERR(t_alg)) {
+                       err = PTR_ERR(t_alg);
diff --git a/queue-4.8/drm-amdgpu-attach-exclusive-fence-to-prime-exported-bo-s.-v5.patch b/queue-4.8/drm-amdgpu-attach-exclusive-fence-to-prime-exported-bo-s.-v5.patch
new file mode 100644 (file)
index 0000000..e51ad7b
--- /dev/null
@@ -0,0 +1,136 @@
+From 8e94a46c1770884166b31adc99eba7da65a446a7 Mon Sep 17 00:00:00 2001
+From: Mario Kleiner <mario.kleiner.de@gmail.com>
+Date: Wed, 9 Nov 2016 02:25:15 +0100
+Subject: drm/amdgpu: Attach exclusive fence to prime exported bo's. (v5)
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Mario Kleiner <mario.kleiner.de@gmail.com>
+
+commit 8e94a46c1770884166b31adc99eba7da65a446a7 upstream.
+
+External clients which import our bo's wait only
+for exclusive dmabuf-fences, not on shared ones,
+ditto for bo's which we import from external
+providers and write to.
+
+Therefore attach exclusive fences on prime shared buffers
+if our exported buffer gets imported by an external
+client, or if we import a buffer from an external
+exporter.
+
+See discussion in thread:
+https://lists.freedesktop.org/archives/dri-devel/2016-October/122370.html
+
+Prime export tested on Intel iGPU + AMD Tonga dGPU as
+DRI3/Present Prime render offload, and with the Tonga
+standalone as primary gpu.
+
+v2: Add a wait for all shared fences before prime export,
+    as suggested by Christian Koenig.
+
+v3: - Mark buffer prime_exported in amdgpu_gem_prime_pin,
+    so we only use the exclusive fence when exporting a
+    bo to external clients like a separate iGPU, but not
+    when exporting/importing from/to ourselves as part of
+    regular DRI3 fd passing.
+
+    - Propagate failure of reservation_object_wait_rcu back
+    to caller.
+
+v4: - Switch to a prime_shared_count counter instead of a
+      flag, which gets in/decremented on prime_pin/unpin, so
+      we can switch back to shared fences if all clients
+      detach from our exported bo.
+
+    - Also switch to exclusive fence for prime imported bo's.
+
+v5: - Drop lret, instead use int ret -> long ret, as proposed
+      by Christian.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95472
+Tested-by: Mike Lothian <mike@fireburn.co.uk> (v1)
+Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
+Reviewed-by: Christian König <christian.koenig@amd.com>.
+Cc: Christian König <christian.koenig@amd.com>
+Cc: Michel Dänzer <michel.daenzer@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu.h         |    1 +
+ drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c |    2 +-
+ drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c   |   20 +++++++++++++++++++-
+ 3 files changed, 21 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+@@ -492,6 +492,7 @@ struct amdgpu_bo {
+       u64                             metadata_flags;
+       void                            *metadata;
+       u32                             metadata_size;
++      unsigned                        prime_shared_count;
+       /* list of all virtual address to which this bo
+        * is associated to
+        */
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
+@@ -132,7 +132,7 @@ static int amdgpu_bo_list_set(struct amd
+               entry->priority = min(info[i].bo_priority,
+                                     AMDGPU_BO_LIST_MAX_PRIORITY);
+               entry->tv.bo = &entry->robj->tbo;
+-              entry->tv.shared = true;
++              entry->tv.shared = !entry->robj->prime_shared_count;
+               if (entry->robj->prefered_domains == AMDGPU_GEM_DOMAIN_GDS)
+                       gds_obj = entry->robj;
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
+@@ -74,20 +74,36 @@ amdgpu_gem_prime_import_sg_table(struct
+       if (ret)
+               return ERR_PTR(ret);
++      bo->prime_shared_count = 1;
+       return &bo->gem_base;
+ }
+ int amdgpu_gem_prime_pin(struct drm_gem_object *obj)
+ {
+       struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
+-      int ret = 0;
++      long ret = 0;
+       ret = amdgpu_bo_reserve(bo, false);
+       if (unlikely(ret != 0))
+               return ret;
++      /*
++       * Wait for all shared fences to complete before we switch to future
++       * use of exclusive fence on this prime shared bo.
++       */
++      ret = reservation_object_wait_timeout_rcu(bo->tbo.resv, true, false,
++                                                MAX_SCHEDULE_TIMEOUT);
++      if (unlikely(ret < 0)) {
++              DRM_DEBUG_PRIME("Fence wait failed: %li\n", ret);
++              amdgpu_bo_unreserve(bo);
++              return ret;
++      }
++
+       /* pin buffer into GTT */
+       ret = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT, NULL);
++      if (likely(ret == 0))
++              bo->prime_shared_count++;
++
+       amdgpu_bo_unreserve(bo);
+       return ret;
+ }
+@@ -102,6 +118,8 @@ void amdgpu_gem_prime_unpin(struct drm_g
+               return;
+       amdgpu_bo_unpin(bo);
++      if (bo->prime_shared_count)
++              bo->prime_shared_count--;
+       amdgpu_bo_unreserve(bo);
+ }
diff --git a/queue-4.8/drm-i915-assume-non-dp-port-if-dvo_port-is-hdmi-and-there-s-no-aux-ch-specified-in-the-vbt.patch b/queue-4.8/drm-i915-assume-non-dp-port-if-dvo_port-is-hdmi-and-there-s-no-aux-ch-specified-in-the-vbt.patch
new file mode 100644 (file)
index 0000000..1fde528
--- /dev/null
@@ -0,0 +1,131 @@
+From bc9db5ad3253c8e17969bd802c47b73e63f125ab Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
+Date: Fri, 11 Nov 2016 19:14:24 +0200
+Subject: drm/i915: Assume non-DP++ port if dvo_port is HDMI and there's no AUX ch specified in the VBT
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Ville Syrjälä <ville.syrjala@linux.intel.com>
+
+commit bc9db5ad3253c8e17969bd802c47b73e63f125ab upstream.
+
+My heuristic for detecting type 1 DVI DP++ adaptors based on the VBT
+port information apparently didn't survive the reality of buggy VBTs.
+In this particular case we have a machine with a natice HDMI port, but
+the VBT tells us it's a DP++ port based on its capabilities.
+
+The dvo_port information in VBT does claim that we're dealing with a
+HDMI port though, but we have other machines which do the same even
+when they actually have DP++ ports. So that piece of information alone
+isn't sufficient to tell the two apart.
+
+After staring at a bunch of VBTs from various machines, I have to
+conclude that the only other semi-reliable clue we can use is the
+presence of the AUX channel in the VBT. On this particular machine
+AUX channel is specified as zero, whereas on some of the other machines
+which listed the DP++ port as HDMI have a non-zero AUX channel.
+
+I've also seen VBTs which have dvo_port a DP but have a zero AUX
+channel. I believe those we need to treat as DP ports, so we'll limit
+the AUX channel check to just the cases where dvo_port is HDMI.
+
+If we encounter any more serious failures with this heuristic I think
+we'll have to have to throw it out entirely. But that could mean that
+there is a risk of type 1 DVI dongle users getting greeted by a
+black screen, so I'd rather not go there unless absolutely necessary.
+
+v2: Remove the duplicate PORT_A check (Daniel)
+    Fix some typos in the commit message
+
+Cc: Daniel Otero <daniel.otero@outlook.com>
+Tested-by: Daniel Otero <daniel.otero@outlook.com>
+Fixes: d61992565bd3 ("drm/i915: Determine DP++ type 1 DVI adaptor presence based on VBT")
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97994
+Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1478884464-14251-1-git-send-email-ville.syrjala@linux.intel.com
+Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+(cherry picked from commit 7a17995a3dc8613f778a9e2fd20e870f17789544)
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_bios.c     |   30 ++++++++++++++++++++++--------
+ drivers/gpu/drm/i915/intel_vbt_defs.h |    3 ++-
+ 2 files changed, 24 insertions(+), 9 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_bios.c
++++ b/drivers/gpu/drm/i915/intel_bios.c
+@@ -1143,7 +1143,7 @@ static void parse_ddi_port(struct drm_i9
+       if (!child)
+               return;
+-      aux_channel = child->raw[25];
++      aux_channel = child->common.aux_channel;
+       ddc_pin = child->common.ddc_pin;
+       is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
+@@ -1673,7 +1673,8 @@ bool intel_bios_is_port_edp(struct drm_i
+       return false;
+ }
+-bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, enum port port)
++static bool child_dev_is_dp_dual_mode(const union child_device_config *p_child,
++                                    enum port port)
+ {
+       static const struct {
+               u16 dp, hdmi;
+@@ -1687,22 +1688,35 @@ bool intel_bios_is_port_dp_dual_mode(str
+               [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
+               [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
+       };
+-      int i;
+       if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
+               return false;
+-      if (!dev_priv->vbt.child_dev_num)
++      if ((p_child->common.device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
++          (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
+               return false;
++      if (p_child->common.dvo_port == port_mapping[port].dp)
++              return true;
++
++      /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
++      if (p_child->common.dvo_port == port_mapping[port].hdmi &&
++          p_child->common.aux_channel != 0)
++              return true;
++
++      return false;
++}
++
++bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
++                                   enum port port)
++{
++      int i;
++
+       for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
+               const union child_device_config *p_child =
+                       &dev_priv->vbt.child_dev[i];
+-              if ((p_child->common.dvo_port == port_mapping[port].dp ||
+-                   p_child->common.dvo_port == port_mapping[port].hdmi) &&
+-                  (p_child->common.device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) ==
+-                  (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
++              if (child_dev_is_dp_dual_mode(p_child, port))
+                       return true;
+       }
+--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
++++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
+@@ -280,7 +280,8 @@ struct common_child_dev_config {
+       u8 dp_support:1;
+       u8 tmds_support:1;
+       u8 support_reserved:5;
+-      u8 not_common3[12];
++      u8 aux_channel;
++      u8 not_common3[11];
+       u8 iboost_level;
+ } __packed;
diff --git a/queue-4.8/drm-i915-refresh-that-status-of-mst-capable-connectors-in-detect.patch b/queue-4.8/drm-i915-refresh-that-status-of-mst-capable-connectors-in-detect.patch
new file mode 100644 (file)
index 0000000..b601a19
--- /dev/null
@@ -0,0 +1,63 @@
+From fc22b787890f9f9067fd130feec42297a4ee62ba Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
+Date: Fri, 21 Oct 2016 16:44:38 +0300
+Subject: drm/i915: Refresh that status of MST capable connectors in ->detect()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Ville Syrjälä <ville.syrjala@linux.intel.com>
+
+commit fc22b787890f9f9067fd130feec42297a4ee62ba upstream.
+
+Once we've determined that the sink is MST capable we never end up
+running through the full detect cycle again, despite getting HPDs.
+Fix tht by ripping out the incorrect piece of code responsible.
+
+This got broken when I moved the long HPD handling to the ->detect()
+hook, but failed to remove the leftover code.
+
+Cc: Ander Conselvan de Oliveira <conselvan2@gmail.com>
+Cc: drm-intel-fixes@lists.freedesktop.org
+Cc: Rui Tiago Matos <tiagomatos@gmail.com>
+Tested-by: Rui Tiago Matos <tiagomatos@gmail.com>
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98323
+Cc: Kirill A. Shutemov <kirill@shutemov.name>
+Tested-by: Kirill A. Shutemov <kirill@shutemov.name>
+References: https://bugs.freedesktop.org/show_bug.cgi?id=98306
+Fixes: 1015811609c0 ("drm/i915: Move long hpd handling into the hotplug work")
+Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1477057478-29328-1-git-send-email-ville.syrjala@linux.intel.com
+Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
+(cherry picked from commit 1aab956c7b8872fb6976328316bfad62c6e67cf8)
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_dp.c |   10 ----------
+ 1 file changed, 10 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_dp.c
++++ b/drivers/gpu/drm/i915/intel_dp.c
+@@ -4323,21 +4323,11 @@ static enum drm_connector_status
+ intel_dp_detect(struct drm_connector *connector, bool force)
+ {
+       struct intel_dp *intel_dp = intel_attached_dp(connector);
+-      struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+-      struct intel_encoder *intel_encoder = &intel_dig_port->base;
+       enum drm_connector_status status = connector->status;
+       DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
+                     connector->base.id, connector->name);
+-      if (intel_dp->is_mst) {
+-              /* MST devices are disconnected from a monitor POV */
+-              intel_dp_unset_edid(intel_dp);
+-              if (intel_encoder->type != INTEL_OUTPUT_EDP)
+-                      intel_encoder->type = INTEL_OUTPUT_DP;
+-              return connector_status_disconnected;
+-      }
+-
+       /* If full detect is not performed yet, do a full detect */
+       if (!intel_dp->detect_done)
+               status = intel_dp_long_pulse(intel_dp->attached_connector);
diff --git a/queue-4.8/powerpc-64-fix-setting-of-ail-in-hypervisor-mode.patch b/queue-4.8/powerpc-64-fix-setting-of-ail-in-hypervisor-mode.patch
new file mode 100644 (file)
index 0000000..35f3f2d
--- /dev/null
@@ -0,0 +1,61 @@
+From c0a36013639b06760f7c2c21a8387eac855432e1 Mon Sep 17 00:00:00 2001
+From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+Date: Tue, 15 Nov 2016 15:28:33 +1100
+Subject: powerpc/64: Fix setting of AIL in hypervisor mode
+
+From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+
+commit c0a36013639b06760f7c2c21a8387eac855432e1 upstream.
+
+Commit d3cbff1b5 "powerpc: Put exception configuration in a common place"
+broke the setting of the AIL bit (which enables taking exceptions with
+the MMU still on) on all processors, moving it incorrectly to a function
+called only on the boot CPU. This was correct for the guest case but
+not when running in hypervisor mode.
+
+This fixes it by partially reverting that commit, putting the setting
+back in cpu_ready_for_interrupts()
+
+Fixes: d3cbff1b5a90 ("powerpc: Put exception configuration in a common place")
+Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/powerpc/kernel/setup_64.c |   20 ++++++++++++++------
+ 1 file changed, 14 insertions(+), 6 deletions(-)
+
+--- a/arch/powerpc/kernel/setup_64.c
++++ b/arch/powerpc/kernel/setup_64.c
+@@ -226,17 +226,25 @@ static void __init configure_exceptions(
+               if (firmware_has_feature(FW_FEATURE_OPAL))
+                       opal_configure_cores();
+-              /* Enable AIL if supported, and we are in hypervisor mode */
+-              if (early_cpu_has_feature(CPU_FTR_HVMODE) &&
+-                  early_cpu_has_feature(CPU_FTR_ARCH_207S)) {
+-                      unsigned long lpcr = mfspr(SPRN_LPCR);
+-                      mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3);
+-              }
++              /* AIL on native is done in cpu_ready_for_interrupts() */
+       }
+ }
+ static void cpu_ready_for_interrupts(void)
+ {
++      /*
++       * Enable AIL if supported, and we are in hypervisor mode. This
++       * is called once for every processor.
++       *
++       * If we are not in hypervisor mode the job is done once for
++       * the whole partition in configure_exceptions().
++       */
++      if (early_cpu_has_feature(CPU_FTR_HVMODE) &&
++          early_cpu_has_feature(CPU_FTR_ARCH_207S)) {
++              unsigned long lpcr = mfspr(SPRN_LPCR);
++              mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3);
++      }
++
+       /* Set IR and DR in PACA MSR */
+       get_paca()->kernel_msr = MSR_KERNEL;
+ }
index ea787fb1fcfde2549a77b778b83ff0f58f646add..da428c3a452e3db44465d6ad9da92ad98d2fec2f 100644 (file)
@@ -26,3 +26,9 @@ x86-kexec-add-fno-pie.patch
 kbuild-steal-gcc-s-pie-from-the-very-beginning.patch
 ext4-sanity-check-the-block-and-cluster-size-at-mount-time.patch
 arm-dts-imx53-qsb-fix-regulator-constraints.patch
+crypto-caam-do-not-register-aes-xts-mode-on-lp-units.patch
+powerpc-64-fix-setting-of-ail-in-hypervisor-mode.patch
+drm-amdgpu-attach-exclusive-fence-to-prime-exported-bo-s.-v5.patch
+drm-i915-refresh-that-status-of-mst-capable-connectors-in-detect.patch
+drm-i915-assume-non-dp-port-if-dvo_port-is-hdmi-and-there-s-no-aux-ch-specified-in-the-vbt.patch
+virtio-net-drop-legacy-features-in-virtio-1-mode.patch
diff --git a/queue-4.8/virtio-net-drop-legacy-features-in-virtio-1-mode.patch b/queue-4.8/virtio-net-drop-legacy-features-in-virtio-1-mode.patch
new file mode 100644 (file)
index 0000000..fa614af
--- /dev/null
@@ -0,0 +1,70 @@
+From f3358507c11999c91abf54744658bccd49b5879c Mon Sep 17 00:00:00 2001
+From: "Michael S. Tsirkin" <mst@redhat.com>
+Date: Fri, 4 Nov 2016 12:55:36 +0200
+Subject: virtio-net: drop legacy features in virtio 1 mode
+
+From: Michael S. Tsirkin <mst@redhat.com>
+
+commit f3358507c11999c91abf54744658bccd49b5879c upstream.
+
+Virtio 1.0 spec says VIRTIO_F_ANY_LAYOUT and VIRTIO_NET_F_GSO are
+legacy-only feature bits. Do not negotiate them in virtio 1 mode.  Note
+this is a spec violation so we need to backport it to stable/downstream
+kernels.
+
+Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
+Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
+Acked-by: Jason Wang <jasowang@redhat.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/virtio_net.c |   30 ++++++++++++++++++++----------
+ 1 file changed, 20 insertions(+), 10 deletions(-)
+
+--- a/drivers/net/virtio_net.c
++++ b/drivers/net/virtio_net.c
+@@ -2010,23 +2010,33 @@ static struct virtio_device_id id_table[
+       { 0 },
+ };
++#define VIRTNET_FEATURES \
++      VIRTIO_NET_F_CSUM, VIRTIO_NET_F_GUEST_CSUM, \
++      VIRTIO_NET_F_MAC, \
++      VIRTIO_NET_F_HOST_TSO4, VIRTIO_NET_F_HOST_UFO, VIRTIO_NET_F_HOST_TSO6, \
++      VIRTIO_NET_F_HOST_ECN, VIRTIO_NET_F_GUEST_TSO4, VIRTIO_NET_F_GUEST_TSO6, \
++      VIRTIO_NET_F_GUEST_ECN, VIRTIO_NET_F_GUEST_UFO, \
++      VIRTIO_NET_F_MRG_RXBUF, VIRTIO_NET_F_STATUS, VIRTIO_NET_F_CTRL_VQ, \
++      VIRTIO_NET_F_CTRL_RX, VIRTIO_NET_F_CTRL_VLAN, \
++      VIRTIO_NET_F_GUEST_ANNOUNCE, VIRTIO_NET_F_MQ, \
++      VIRTIO_NET_F_CTRL_MAC_ADDR, \
++      VIRTIO_NET_F_MTU
++
+ static unsigned int features[] = {
+-      VIRTIO_NET_F_CSUM, VIRTIO_NET_F_GUEST_CSUM,
+-      VIRTIO_NET_F_GSO, VIRTIO_NET_F_MAC,
+-      VIRTIO_NET_F_HOST_TSO4, VIRTIO_NET_F_HOST_UFO, VIRTIO_NET_F_HOST_TSO6,
+-      VIRTIO_NET_F_HOST_ECN, VIRTIO_NET_F_GUEST_TSO4, VIRTIO_NET_F_GUEST_TSO6,
+-      VIRTIO_NET_F_GUEST_ECN, VIRTIO_NET_F_GUEST_UFO,
+-      VIRTIO_NET_F_MRG_RXBUF, VIRTIO_NET_F_STATUS, VIRTIO_NET_F_CTRL_VQ,
+-      VIRTIO_NET_F_CTRL_RX, VIRTIO_NET_F_CTRL_VLAN,
+-      VIRTIO_NET_F_GUEST_ANNOUNCE, VIRTIO_NET_F_MQ,
+-      VIRTIO_NET_F_CTRL_MAC_ADDR,
++      VIRTNET_FEATURES,
++};
++
++static unsigned int features_legacy[] = {
++      VIRTNET_FEATURES,
++      VIRTIO_NET_F_GSO,
+       VIRTIO_F_ANY_LAYOUT,
+-      VIRTIO_NET_F_MTU,
+ };
+ static struct virtio_driver virtio_net_driver = {
+       .feature_table = features,
+       .feature_table_size = ARRAY_SIZE(features),
++      .feature_table_legacy = features_legacy,
++      .feature_table_size_legacy = ARRAY_SIZE(features_legacy),
+       .driver.name =  KBUILD_MODNAME,
+       .driver.owner = THIS_MODULE,
+       .id_table =     id_table,