]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/amd/display: Remove unused dwb3_set_host_read_rate_control
authorDr. David Alan Gilbert <linux@treblig.org>
Mon, 4 Nov 2024 02:38:49 +0000 (02:38 +0000)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 10 Dec 2024 15:38:19 +0000 (10:38 -0500)
dwb3_set_host_read_rate_control() has been unused since it was added by
commit 8993dee0de2a ("drm/amd/display: Add DCN3 DWB")

Remove it.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dwb/dcn30/dcn30_dwb.c
drivers/gpu/drm/amd/display/dc/dwb/dcn30/dcn30_dwb.h

index fae98cf520201d5afe11c8c17e57d0a5c6dc1a9e..bc058f6824385ef6477f5d3a0aef2f395fac50a7 100644 (file)
@@ -270,16 +270,3 @@ void dcn30_dwbc_construct(struct dcn30_dwbc *dwbc30,
        dwbc30->dwbc_shift = dwbc_shift;
        dwbc30->dwbc_mask = dwbc_mask;
 }
-
-void dwb3_set_host_read_rate_control(struct dwbc *dwbc, bool host_read_delay)
-{
-       struct dcn30_dwbc *dwbc30 = TO_DCN30_DWBC(dwbc);
-
-       /*
-        * Set maximum delay of host read access to DWBSCL LUT or OGAM LUT if there are no
-        * idle cycles in HW pipeline (in number of clock cycles times 4)
-        */
-       REG_UPDATE(DWB_HOST_READ_CONTROL, DWB_HOST_READ_RATE_CONTROL, host_read_delay);
-
-       DC_LOG_DWB("%s dwb3_rate_control at inst = %d", __func__, dwbc->inst);
-}
index 0f3f7c5fbaecf95222a3d3da64404e7867b7826d..7f053f49ec6a3204b0c21c607db526f999ea5725 100644 (file)
@@ -914,7 +914,6 @@ bool dwb3_ogam_set_input_transfer_func(
        struct dwbc *dwbc,
        const struct dc_transfer_func *in_transfer_func_dwb_ogam);
 
-void dwb3_set_host_read_rate_control(struct dwbc *dwbc, bool host_read_delay);
 #endif