]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
target/openrisc: Restrict SoftMMU mmu_index() to TCG
authorPhilippe Mathieu-Daudé <philmd@linaro.org>
Tue, 1 Apr 2025 08:09:27 +0000 (10:09 +0200)
committerRichard Henderson <richard.henderson@linaro.org>
Wed, 23 Apr 2025 22:04:57 +0000 (15:04 -0700)
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-15-philmd@linaro.org>

target/openrisc/cpu.c

index e8abf1f8b5cd4ddb0d0ef8c9c5e3ffd379aa393e..dc55594a7de30ae6e4588dfb70ed2c3e1969ff4c 100644 (file)
@@ -247,6 +247,7 @@ static const TCGCPUOps openrisc_tcg_ops = {
     .translate_code = openrisc_translate_code,
     .synchronize_from_tb = openrisc_cpu_synchronize_from_tb,
     .restore_state_to_opc = openrisc_restore_state_to_opc,
+    .mmu_index = openrisc_cpu_mmu_index,
 
 #ifndef CONFIG_USER_ONLY
     .tlb_fill = openrisc_cpu_tlb_fill,
@@ -269,7 +270,6 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
                                        &occ->parent_phases);
 
     cc->class_by_name = openrisc_cpu_class_by_name;
-    cc->mmu_index = openrisc_cpu_mmu_index;
     cc->dump_state = openrisc_cpu_dump_state;
     cc->set_pc = openrisc_cpu_set_pc;
     cc->get_pc = openrisc_cpu_get_pc;