]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
ARM: dts: bcm6846: Add GPIO blocks
authorLinus Walleij <linus.walleij@linaro.org>
Sat, 19 Oct 2024 20:39:32 +0000 (22:39 +0200)
committerFlorian Fainelli <florian.fainelli@broadcom.com>
Tue, 17 Dec 2024 18:23:28 +0000 (10:23 -0800)
The BCM6846 has the same simplistic GPIOs as some other
Broadcom SoCs: plain memory-mapped registers with up to
8 blocks of 32 GPIOs each totalling 256 GPIOs.

Users of the SoC can selectively enable the GPIO blocks
actually used with a certain design.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20241019-genexis-xg6846b-base-v3-3-8375a0e1f89f@linaro.org
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
arch/arm/boot/dts/broadcom/bcm6846.dtsi

index f4f1f3a06eac1cc7081bbd26f2c3a37fa6bd89e6..dc0c87c79569557ebd26a2202a7f02a772939dde 100644 (file)
                        reg = <0x480 0x10>;
                };
 
+               /* GPIOs 0 .. 31 */
+               gpio0: gpio@500 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x500 0x04>, <0x520 0x04>;
+                       reg-names = "dirout", "dat";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
+
+               /* GPIOs 32 .. 63 */
+               gpio1: gpio@504 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x504 0x04>, <0x524 0x04>;
+                       reg-names = "dirout", "dat";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
+
+               /* GPIOs 64 .. 95 */
+               gpio2: gpio@508 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x508 0x04>, <0x528 0x04>;
+                       reg-names = "dirout", "dat";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
+
+               /* GPIOs 96 .. 127 */
+               gpio3: gpio@50c {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x50c 0x04>, <0x52c 0x04>;
+                       reg-names = "dirout", "dat";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
+
+               /* GPIOs 128 .. 159 */
+               gpio4: gpio@510 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x510 0x04>, <0x530 0x04>;
+                       reg-names = "dirout", "dat";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
+
+               /* GPIOs 160 .. 191 */
+               gpio5: gpio@514 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x514 0x04>, <0x534 0x04>;
+                       reg-names = "dirout", "dat";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
+
+               /* GPIOs 192 .. 223 */
+               gpio6: gpio@518 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x518 0x04>, <0x538 0x04>;
+                       reg-names = "dirout", "dat";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
+
+               /* GPIOs 224 .. 255 */
+               gpio7: gpio@51c {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x51c 0x04>, <0x53c 0x04>;
+                       reg-names = "dirout", "dat";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
+
                uart0: serial@640 {
                        compatible = "brcm,bcm6345-uart";
                        reg = <0x640 0x1b>;