drm/amdgpu: cleanup gmc_v11_0_flush_gpu_tlb

Remove leftovers from copying this from the gmc v10 code.

v2: squash in fix from Yifan

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 42fc0cc13fddc02666cf980f5e1b97c2c1bc85fc..9c4562bda8cdbf436ab58f41c4d9ddfc6742ea4a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -1329,8 +1329,6 @@ static int gfx_v11_0_sw_init(void *handle)
        struct amdgpu_kiq *kiq;
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-       adev->gfxhub.funcs->init(adev);
-
        switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
        case IP_VERSION(11, 0, 0):
        case IP_VERSION(11, 0, 2):

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index f9c1ff2d940bc96593a7321908006ef41dc84e7e..5c5175e479529c1bcfb6fe3f1e040b7d9896e4d9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
@@ -186,27 +186,50 @@ static bool gmc_v11_0_get_vmid_pasid_mapping_info(
        return !!(*p_pasid);
 }
 
-/*
- * GART
- * VMID 0 is the physical GPU addresses as used by the kernel.
- * VMIDs 1-15 are used for userspace clients and are handled
- * by the amdgpu vm/hsa code.
+/**
+ * gmc_v11_0_flush_gpu_tlb - gart tlb flush callback
+ *
+ * @adev: amdgpu_device pointer
+ * @vmid: vm instance to flush
+ * @vmhub: which hub to flush
+ * @flush_type: the flush type
+ *
+ * Flush the TLB for the requested page table.
  */
-
-static void gmc_v11_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,
-                                  unsigned int vmhub, uint32_t flush_type)
+static void gmc_v11_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
+                                       uint32_t vmhub, uint32_t flush_type)
 {
        bool use_semaphore = gmc_v11_0_use_invalidate_semaphore(adev, vmhub);
        struct amdgpu_vmhub *hub = &adev->vmhub[vmhub];
        u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid, flush_type);
-       u32 tmp;
        /* Use register 17 for GART */
        const unsigned int eng = 17;
+       unsigned char hub_ip;
+       u32 sem, req, ack;
        unsigned int i;
-       unsigned char hub_ip = 0;
+       u32 tmp;
+
+       if ((vmhub == AMDGPU_GFXHUB(0)) && !adev->gfx.is_poweron)
+               return;
 
-       hub_ip = (vmhub == AMDGPU_GFXHUB(0)) ?
-                  GC_HWIP : MMHUB_HWIP;
+       sem = hub->vm_inv_eng0_sem + hub->eng_distance * eng;
+       req = hub->vm_inv_eng0_req + hub->eng_distance * eng;
+       ack = hub->vm_inv_eng0_ack + hub->eng_distance * eng;
+
+       /* flush hdp cache */
+       adev->hdp.funcs->flush_hdp(adev, NULL);
+
+       /* For SRIOV run time, driver shouldn't access the register through MMIO
+        * Directly use kiq to do the vm invalidation instead
+        */
+       if ((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring.sched.ready) &&
+           (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev))) {
+               amdgpu_virt_kiq_reg_write_reg_wait(adev, req, ack, inv_req,
+                               1 << vmid);
+               return;
+       }
+
+       hub_ip = (vmhub == AMDGPU_GFXHUB(0)) ? GC_HWIP : MMHUB_HWIP;
 
        spin_lock(&adev->gmc.invalidate_lock);
        /*
@@ -220,8 +243,7 @@ static void gmc_v11_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,
        if (use_semaphore) {
                for (i = 0; i < adev->usec_timeout; i++) {
                        /* a read return value of 1 means semaphore acuqire */
-                       tmp = RREG32_RLC_NO_KIQ(hub->vm_inv_eng0_sem +
-                                           hub->eng_distance * eng, hub_ip);
+                       tmp = RREG32_RLC_NO_KIQ(sem, hub_ip);
                        if (tmp & 0x1)
                                break;
                        udelay(1);
@@ -231,12 +253,11 @@ static void gmc_v11_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,
                        DRM_ERROR("Timeout waiting for sem acquire in VM flush!\n");
        }
 
-       WREG32_RLC_NO_KIQ(hub->vm_inv_eng0_req + hub->eng_distance * eng, inv_req, hub_ip);
+       WREG32_RLC_NO_KIQ(req, inv_req, hub_ip);
 
        /* Wait for ACK with a delay.*/
        for (i = 0; i < adev->usec_timeout; i++) {
-               tmp = RREG32_RLC_NO_KIQ(hub->vm_inv_eng0_ack +
-                                   hub->eng_distance * eng, hub_ip);
+               tmp = RREG32_RLC_NO_KIQ(ack, hub_ip);
                tmp &= 1 << vmid;
                if (tmp)
                        break;
@@ -246,12 +267,7 @@ static void gmc_v11_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,
 
        /* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */
        if (use_semaphore)
-               /*
-                * add semaphore release after invalidation,
-                * write with 0 means semaphore release
-                */
-               WREG32_RLC_NO_KIQ(hub->vm_inv_eng0_sem +
-                             hub->eng_distance * eng, 0, hub_ip);
+               WREG32_RLC_NO_KIQ(sem, 0, hub_ip);
 
        /* Issue additional private vm invalidation to MMHUB */
        if ((vmhub != AMDGPU_GFXHUB(0)) &&
@@ -268,50 +284,8 @@ static void gmc_v11_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,
 
        spin_unlock(&adev->gmc.invalidate_lock);
 
-       if (i < adev->usec_timeout)
-               return;
-
-       dev_err(adev->dev, "Timeout waiting for VM flush ACK!\n");
-}
-
-/**
- * gmc_v11_0_flush_gpu_tlb - gart tlb flush callback
- *
- * @adev: amdgpu_device pointer
- * @vmid: vm instance to flush
- * @vmhub: which hub to flush
- * @flush_type: the flush type
- *
- * Flush the TLB for the requested page table.
- */
-static void gmc_v11_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
-                                       uint32_t vmhub, uint32_t flush_type)
-{
-       if ((vmhub == AMDGPU_GFXHUB(0)) && !adev->gfx.is_poweron)
-               return;
-
-       /* flush hdp cache */
-       adev->hdp.funcs->flush_hdp(adev, NULL);
-
-       /* For SRIOV run time, driver shouldn't access the register through MMIO
-        * Directly use kiq to do the vm invalidation instead
-        */
-       if ((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring.sched.ready) &&
-           (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev))) {
-               struct amdgpu_vmhub *hub = &adev->vmhub[vmhub];
-               const unsigned int eng = 17;
-               u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid, flush_type);
-               u32 req = hub->vm_inv_eng0_req + hub->eng_distance * eng;
-               u32 ack = hub->vm_inv_eng0_ack + hub->eng_distance * eng;
-
-               amdgpu_virt_kiq_reg_write_reg_wait(adev, req, ack, inv_req,
-                               1 << vmid);
-               return;
-       }
-
-       mutex_lock(&adev->mman.gtt_window_lock);
-       gmc_v11_0_flush_vm_hub(adev, vmid, vmhub, 0);
-       mutex_unlock(&adev->mman.gtt_window_lock);
+       if (i >= adev->usec_timeout)
+               dev_err(adev->dev, "Timeout waiting for VM flush ACK!\n");
 }
 
 /**
@@ -774,6 +748,8 @@ static int gmc_v11_0_sw_init(void *handle)
 
        adev->mmhub.funcs->init(adev);
 
+       adev->gfxhub.funcs->init(adev);
+
        spin_lock_init(&adev->gmc.invalidate_lock);
 
        r = amdgpu_atomfirmware_get_vram_info(adev,