+2025-07-14 Andrew Stubbs <ams@baylibre.com>
+
+ * config/gcn/gcn-valu.md (vec_cmpu<mode>di_exec): Call gen_vec_cmp*,
+ not gen_vec_cmpu*.
+
+2025-07-14 Richard Biener <rguenther@suse.de>
+
+ Revert:
+ 2025-07-14 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/121059
+ * tree-vect-stmts.cc (vectorizable_operation): Record a
+ loop mask for mask AND operations.
+
+2025-07-14 Juergen Christ <jchrist@linux.ibm.com>
+
+ * config/s390/vector.md (reduc_plus_scal_<mode>): Implement.
+ (reduc_plus_scal_v2df): Implement.
+ (reduc_plus_scal_v4sf): Implement.
+ (REDUC_FMINMAX): New int iterator.
+ (reduc_fminmax_name): New int attribute.
+ (reduc_minmax): New code iterator.
+ (reduc_minmax_name): New code attribute.
+ (reduc_<reduc_fminmax_name>_scal_v2df): Implement.
+ (reduc_<reduc_fminmax_name>_scal_v4sf): Implement.
+ (reduc_<reduc_minmax_name>_scal_v2df): Implement.
+ (reduc_<reduc_minmax_name>_scal_v4sf): Implement.
+ (REDUCBIN): New code iterator.
+ (reduc_bin_insn): New code attribute.
+ (reduc_<reduc_bin_insn>_scal_v2di): Implement.
+ (reduc_<reduc_bin_insn>_scal_v4si): Implement.
+ (reduc_<reduc_bin_insn>_scal_v8hi): Implement.
+ (reduc_<reduc_bin_insn>_scal_v16qi): Implement.
+
+2025-07-14 Juergen Christ <jchrist@linux.ibm.com>
+
+ * config/s390/s390.cc (s390_option_override_internal): Remove override.
+
+2025-07-14 Andrew Stubbs <ams@baylibre.com>
+
+ * config/gcn/gcn-valu.md (add<mode>3<exec_clobber>): Rename ...
+ (add<mode>3<exec>): ... to this, remove the clobber, and change the
+ instruction from v_add_co_u32 to v_add_u32.
+ (add<mode>3_dup<exec_clobber>): Rename ...
+ (add<mode>3_dup<exec>): ... to this, and likewise.
+ (sub<mode>3<exec_clobber>): Rename ...
+ (sub<mode>3<exec>): ... to this, and likewise
+ * config/gcn/gcn.md (addsi3): Remove the DI clobber, and change the
+ instruction from v_add_co_u32 to v_add_u32.
+ (addsi3_scc): Likewise.
+ (subsi3): Likewise, but for v_sub_co_u32.
+ (muldi3): Likewise.
+
+2025-07-14 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/121059
+ * tree-vect-stmts.cc (vectorizable_operation): Record a
+ loop mask for mask AND operations.
+
+2025-07-14 Pan Li <pan2.li@intel.com>
+
+ * match.pd: Make sure widen mul has twice bitsize
+ of the inputs in SAT_MUL pattern.
+
+2025-07-14 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/121015
+ * config/i386/i386-features.cc (ix86_broadcast_inner): Check all
+ 0s/1s vectors with standard_sse_constant_p.
+
+2025-07-14 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/120881
+ * config.in: Regenerated.
+ * configure: Likewise.
+ * configure.ac: Add --enable-x86-64-mfentry.
+ * config/i386/i386-options.cc (ix86_option_override_internal):
+ Enable __fentry__ in 64-bit mode if ENABLE_X86_64_MFENTRY is set
+ to 1. Warn -pg without -mfentry with shrink wrapping enabled.
+ * doc/install.texi: Document --enable-x86-64-mfentry.
+
+2025-07-14 François-Xavier Coudert <fxcoudert@gcc.gnu.org>
+
+ PR target/120645
+ * config/darwin-driver.cc: Account for latest macOS numbering
+ scheme.
+
+2025-07-14 Paul-Antoine Arras <parras@baylibre.com>
+
+ PR target/119100
+ * config/riscv/autovec-opt.md (*vfwmacc_vf_<mode>): New pattern to
+ handle both vfwmacc and vfwmsac.
+ (*extend_vf_<mode>): New pattern that serves as an intermediate combine
+ step.
+ * config/riscv/vector-iterators.md (vsubel): New mode attribute. This is
+ just the lower-case version of VSUBEL.
+ * config/riscv/vector.md (@pred_widen_mul_<optab><mode>_scalar): Reorder
+ and swap operands to match the RTL emitted by expand, i.e. first
+ float_extend then vec_duplicate.
+
+2025-07-14 Alfie Richards <alfie.richards@arm.com>
+
+ * config/aarch64/aarch64-sme.md (@aarch64_sme_<faminmax_uns_op><mode>):
+ New patterns.
+ * config/aarch64/aarch64-sve-builtins-sme.def (svamin): New intrinsics.
+ (svamax): New intrinsics.
+ * config/aarch64/aarch64-sve-builtins-sve2.cc (class faminmaximpl): New
+ class.
+ (svamin): New function.
+ (svamax): New function.
+
+2025-07-14 Haochen Jiang <haochen.jiang@intel.com>
+
+ * config/i386/i386.h (PTA_PANTHERLAKE): Revmoe KL and WIDEKL.
+ (PTA_CLEARWATERFOREST): Ditto.
+ * doc/invoke.texi: Revise documentation.
+
2025-07-13 Andrew Pinski <quic_apinski@quicinc.com>
PR middle-end/120866
+2025-07-14 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR ada/121056
+ * sem_ch4.adb (Try_Object_Operation.Try_Primitive_Operation): Add
+ test on Is_Record_Type before accessing Underlying_Record_View.
+
2025-07-10 Jakub Jelinek <jakub@redhat.com>
* par-load.adb: Comment spelling fix: bellow -> below.
+2025-07-14 Robert Dubner <rdubner@symas.com>
+
+ * cobol1.cc (cobol_langhook_handle_option): Eliminate cppcheck warnings.
+ * dts.h: Likewise.
+ * except.cc (cbl_enabled_exceptions_t::dump): Likewise.
+ * gcobolspec.cc (lang_specific_driver): Likewise.
+ * genapi.cc (parser_file_merge): Likewise.
+ * gengen.cc (gg_unique_in_function): Likewise.
+ (gg_declare_variable): Likewise.
+ (gg_peek_fn_decl): Likewise.
+ (gg_define_function): Likewise.
+ * genmath.cc (set_up_on_exception_label): Likewise.
+ (set_up_compute_error_label): Likewise.
+ (arithmetic_operation): Likewise.
+ (fast_divide): Likewise.
+ * genutil.cc (get_and_check_refstart_and_reflen): Likewise.
+ (get_depending_on_value_from_odo): Likewise.
+ (get_data_offset): Likewise.
+ (get_binary_value): Likewise.
+ (process_this_exception): Likewise.
+ (copy_little_endian_into_place): Likewise.
+ (refer_is_clean): Likewise.
+ (refer_fill_depends): Likewise.
+ * genutil.h (process_this_exception): Likewise.
+ (copy_little_endian_into_place): Likewise.
+ (refer_is_clean): Likewise.
+ * lexio.cc (check_push_pop_directive): Likewise.
+ (check_source_format_directive): Likewise.
+ (location_in): Likewise.
+ (lexer_input): Likewise.
+ (cdftext::lex_open): Likewise.
+ (lexio_dialect_mf): Likewise.
+ (valid_sequence_area): Likewise.
+ (cdftext::free_form_reference_format): Likewise.
+ (cdftext::segment_line): Likewise.
+ * lexio.h (struct span_t): Likewise.
+ * scan_ante.h (trim_location): Likewise.
+ * symbols.cc (symbol_elem_cmp): Likewise.
+ (symbol_alphabet): Likewise.
+ (end_of_group): Likewise.
+ (cbl_field_t::attr_str): Likewise.
+ (symbols_update): Likewise.
+ (symbol_typedef_add): Likewise.
+ (symbol_field_add): Likewise.
+ (new_temporary_impl): Likewise.
+ (symbol_label_section_exists): Likewise.
+ (symbol_program_callables): Likewise.
+ (file_status_status_of): Likewise.
+ * symfind.cc (is_data_field): Likewise.
+ (finalize_symbol_map2): Likewise.
+ (class in_scope): Likewise.
+ (symbol_match2): Likewise.
+ * util.cc (get_current_dir_name): Likewise.
+ (gb4): Likewise.
+ (class cdf_directives_t): Likewise.
+ (cbl_field_t::report_invalid_initial_value): Likewise.
+ (literal_subscript_oob): Likewise.
+ (cbl_refer_t::str): Likewise.
+ (date_time_fmt): Likewise.
+ (class unique_stack): Likewise.
+ (cobol_set_pp_option): Likewise.
+ (cobol_filename): Likewise.
+ (cobol_filename_restore): Likewise.
+ (gcc_location_set_impl): Likewise.
+ (ydferror): Likewise.
+ (error_msg_direct): Likewise.
+ (yyerror): Likewise.
+ (cbl_unimplemented_at): Likewise.
+
2025-07-13 Robert Dubner <rdubner@symas.com>
* Make-lang.in: Eliminate the .cc.o override.
+2025-07-14 Richard Biener <rguenther@suse.de>
+
+ Revert:
+ 2025-07-14 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/121059
+ * gcc.dg/vect/pr121059.c: New testcase.
+
+2025-07-14 Juergen Christ <jchrist@linux.ibm.com>
+
+ * lib/target-supports.exp: Add s390 to vect_logical_reduc targets.
+ * gcc.target/s390/vector/reduc-binops-1.c: New test.
+ * gcc.target/s390/vector/reduc-minmax-1.c: New test.
+ * gcc.target/s390/vector/reduc-plus-1.c: New test.
+
+2025-07-14 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/121059
+ * gcc.dg/vect/pr121059.c: New testcase.
+
+2025-07-14 Pan Li <pan2.li@intel.com>
+
+ * gcc.target/riscv/sat/sat_u_mul-1-u16-from-u64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-1-u32-from-u64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-1-u8-from-u64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-1-u16-from-u64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-1-u32-from-u64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u64.c: New test.
+
+2025-07-14 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/121015
+ * gcc.target/i386/pr121015.c: New test.
+
+2025-07-14 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/120881
+ * gcc.dg/20021014-1.c: Add additional -mfentry -fno-pic options
+ for x86.
+ * gcc.dg/aru-2.c: Likewise.
+ * gcc.dg/nest.c: Likewise.
+ * gcc.dg/pr32450.c: Likewise.
+ * gcc.dg/pr43643.c: Likewise.
+ * gcc.target/i386/pr104447.c: Likewise.
+ * gcc.target/i386/pr113122-3.c: Likewise.
+ * gcc.target/i386/pr119386-1.c: Add additional -mfentry if not
+ ia32.
+ * gcc.target/i386/pr119386-2.c: Likewise.
+ * gcc.target/i386/pr120881-1a.c: New test.
+ * gcc.target/i386/pr120881-1b.c: Likewise.
+ * gcc.target/i386/pr120881-1c.c: Likewise.
+ * gcc.target/i386/pr120881-1d.c: Likewise.
+ * gcc.target/i386/pr120881-2a.c: Likewise.
+ * gcc.target/i386/pr120881-2b.c: Likewise.
+ * gcc.target/i386/pr82699-1.c: Add additional -mfentry.
+ * lib/target-supports.exp (check_effective_target_fentry): New.
+
+2025-07-14 François-Xavier Coudert <fxcoudert@gcc.gnu.org>
+
+ * gcc.dg/darwin-minversion-link.c: Account for macOS 26.
+
+2025-07-14 Paul-Antoine Arras <parras@baylibre.com>
+
+ PR target/119100
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c: Add vfwmacc and
+ vfwmsac.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c: Likewise. Also check
+ for fcvt and vfmv.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c: Add vfwmacc and
+ vfwmsac.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c: Likewise. Also check
+ for fcvt and vfmv.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop.h: Add support for
+ widening variants.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_widen_run.h: New test
+ helper.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmacc-run-1-f16.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmacc-run-1-f32.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmsac-run-1-f16.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmsac-run-1-f32.c: New test.
+
+2025-07-14 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gnat.dg/deref4.adb: New test.
+ * gnat.dg/deref4_pkg.ads: New helper.
+
+2025-07-14 Alfie Richards <alfie.richards@arm.com>
+
+ * gcc.target/aarch64/sme2/acle-asm/amax_f16_x2.c: New test.
+ * gcc.target/aarch64/sme2/acle-asm/amax_f16_x4.c: New test.
+ * gcc.target/aarch64/sme2/acle-asm/amax_f32_x2.c: New test.
+ * gcc.target/aarch64/sme2/acle-asm/amax_f32_x4.c: New test.
+ * gcc.target/aarch64/sme2/acle-asm/amax_f64_x2.c: New test.
+ * gcc.target/aarch64/sme2/acle-asm/amax_f64_x4.c: New test.
+ * gcc.target/aarch64/sme2/acle-asm/amin_f16_x2.c: New test.
+ * gcc.target/aarch64/sme2/acle-asm/amin_f16_x4.c: New test.
+ * gcc.target/aarch64/sme2/acle-asm/amin_f32_x2.c: New test.
+ * gcc.target/aarch64/sme2/acle-asm/amin_f32_x4.c: New test.
+ * gcc.target/aarch64/sme2/acle-asm/amin_f64_x2.c: New test.
+ * gcc.target/aarch64/sme2/acle-asm/amin_f64_x4.c: New test.
+
+2025-07-14 panciyan <panciyan@eswincomputing.com>
+
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h: Unsigned vector SAT_SUB form11 form12.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_data.h: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u16.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u32.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u64.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u8.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u16.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u32.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u64.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u8.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u16.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u32.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u64.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u8.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u16.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u32.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u64.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u8.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u16.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u32.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u64.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u8.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u16.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u32.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u64.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u8.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u16.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u32.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u64.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u8.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u16.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u32.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u64.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u8.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u16.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u32.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u64.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u8.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u16.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u32.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u64.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u8.c: Use ussub instead of usub.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u16.c: New test.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u32.c: New test.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u64.c: New test.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u8.c: New test.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u16.c: New test.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u32.c: New test.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u64.c: New test.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u8.c: New test.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u16.c: New test.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u32.c: New test.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u64.c: New test.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u8.c: New test.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u16.c: New test.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u32.c: New test.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u64.c: New test.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u8.c: New test.
+
2025-07-12 Xi Ruoyao <xry111@xry111.site>
PR rtl-optimization/87600
+2025-07-14 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/bits/stl_pair.h (swap): Add comment to deleted
+ overload.
+ * include/bits/unique_ptr.h (swap): Likewise.
+ * include/std/array (swap): Likewise.
+ * include/std/optional (swap): Likewise.
+ * include/std/tuple (swap): Likewise.
+ * include/std/variant (swap): Likewise.
+ * testsuite/23_containers/array/tuple_interface/get_neg.cc:
+ Adjust dg-error line numbers.
+
+2025-07-14 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/pstl/algorithm_impl.h (__for_each_n_it_serial):
+ Protect against overloaded comma operator.
+ (__brick_walk2): Likewise.
+ (__brick_walk2_n): Likewise.
+ (__brick_walk3): Likewise.
+ (__brick_move_destroy::operator()): Likewise.
+ (__brick_calc_mask_1): Likewise.
+ (__brick_copy_by_mask): Likewise.
+ (__brick_partition_by_mask): Likewise.
+ (__brick_calc_mask_2): Likewise.
+ (__brick_reverse): Likewise.
+ (__pattern_partial_sort_copy): Likewise.
+ * include/pstl/memory_impl.h (__brick_uninitialized_move):
+ Likewise.
+ (__brick_uninitialized_copy): Likewise.
+ * include/pstl/numeric_impl.h (__brick_transform_scan):
+ Likewise.
+
+2025-07-14 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/117785
+ * include/bits/version.def (constexpr_exceptions): Define
+ correct value.
+ * include/bits/version.h: Regenerate.
+ * libsupc++/exception: Check correct value.
+ * testsuite/18_support/exception/version.cc: New test.
+
+2025-07-14 Jonathan Wakely <jwakely@redhat.com>
+
+ * libsupc++/exception_ptr.h (make_exception_ptr): Return null
+ for consteval when -fno-exceptions is used.
+ (exception_ptr_cast): Likewise. Allow consteval path to work
+ with -fno-rtti.
+
2025-07-11 Jakub Jelinek <jakub@redhat.com>
* libsupc++/exception_ptr.h: Implement C++26 P3748R0 - Inspecting
projects / thirdparty / gcc.git / commitdiff
