]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
net: hisilicon: hns: Remove unused hns_dsaf_roce_reset
authorDr. David Alan Gilbert <linux@treblig.org>
Wed, 18 Dec 2024 16:33:38 +0000 (16:33 +0000)
committerJakub Kicinski <kuba@kernel.org>
Fri, 20 Dec 2024 20:56:16 +0000 (12:56 -0800)
hns_dsaf_roce_reset() has been unused since 2021's
commit 38d220882426 ("RDMA/hns: Remove support for HIP06")

Remove it.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Reviewed-by: Jijie Shao<shaojijie@huawei.com>
Link: https://patch.msgid.link/20241218163341.40297-2-linux@treblig.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h

index 851490346261ee89a87230a8bcc73c60a13d43d8..6b6ced37e490ec62e116e591faa599bef323cb4e 100644 (file)
@@ -3019,115 +3019,6 @@ static struct platform_driver g_dsaf_driver = {
 
 module_platform_driver(g_dsaf_driver);
 
-/**
- * hns_dsaf_roce_reset - reset dsaf and roce
- * @dsaf_fwnode: Pointer to framework node for the dasf
- * @dereset: false - request reset , true - drop reset
- * return 0 - success , negative -fail
- */
-int hns_dsaf_roce_reset(struct fwnode_handle *dsaf_fwnode, bool dereset)
-{
-       struct dsaf_device *dsaf_dev;
-       struct platform_device *pdev;
-       u32 mp;
-       u32 sl;
-       u32 credit;
-       int i;
-       static const u32 port_map[DSAF_ROCE_CREDIT_CHN][DSAF_ROCE_CHAN_MODE_NUM] = {
-               {DSAF_ROCE_PORT_0, DSAF_ROCE_PORT_0, DSAF_ROCE_PORT_0},
-               {DSAF_ROCE_PORT_1, DSAF_ROCE_PORT_0, DSAF_ROCE_PORT_0},
-               {DSAF_ROCE_PORT_2, DSAF_ROCE_PORT_1, DSAF_ROCE_PORT_0},
-               {DSAF_ROCE_PORT_3, DSAF_ROCE_PORT_1, DSAF_ROCE_PORT_0},
-               {DSAF_ROCE_PORT_4, DSAF_ROCE_PORT_2, DSAF_ROCE_PORT_1},
-               {DSAF_ROCE_PORT_4, DSAF_ROCE_PORT_2, DSAF_ROCE_PORT_1},
-               {DSAF_ROCE_PORT_5, DSAF_ROCE_PORT_3, DSAF_ROCE_PORT_1},
-               {DSAF_ROCE_PORT_5, DSAF_ROCE_PORT_3, DSAF_ROCE_PORT_1},
-       };
-       static const u32 sl_map[DSAF_ROCE_CREDIT_CHN][DSAF_ROCE_CHAN_MODE_NUM] = {
-               {DSAF_ROCE_SL_0, DSAF_ROCE_SL_0, DSAF_ROCE_SL_0},
-               {DSAF_ROCE_SL_0, DSAF_ROCE_SL_1, DSAF_ROCE_SL_1},
-               {DSAF_ROCE_SL_0, DSAF_ROCE_SL_0, DSAF_ROCE_SL_2},
-               {DSAF_ROCE_SL_0, DSAF_ROCE_SL_1, DSAF_ROCE_SL_3},
-               {DSAF_ROCE_SL_0, DSAF_ROCE_SL_0, DSAF_ROCE_SL_0},
-               {DSAF_ROCE_SL_1, DSAF_ROCE_SL_1, DSAF_ROCE_SL_1},
-               {DSAF_ROCE_SL_0, DSAF_ROCE_SL_0, DSAF_ROCE_SL_2},
-               {DSAF_ROCE_SL_1, DSAF_ROCE_SL_1, DSAF_ROCE_SL_3},
-       };
-
-       /* find the platform device corresponding to fwnode */
-       if (is_of_node(dsaf_fwnode)) {
-               pdev = of_find_device_by_node(to_of_node(dsaf_fwnode));
-       } else if (is_acpi_device_node(dsaf_fwnode)) {
-               pdev = hns_dsaf_find_platform_device(dsaf_fwnode);
-       } else {
-               pr_err("fwnode is neither OF or ACPI type\n");
-               return -EINVAL;
-       }
-
-       /* check if we were a success in fetching pdev */
-       if (!pdev) {
-               pr_err("couldn't find platform device for node\n");
-               return -ENODEV;
-       }
-
-       /* retrieve the dsaf_device from the driver data */
-       dsaf_dev = dev_get_drvdata(&pdev->dev);
-       if (!dsaf_dev) {
-               dev_err(&pdev->dev, "dsaf_dev is NULL\n");
-               put_device(&pdev->dev);
-               return -ENODEV;
-       }
-
-       /* now, make sure we are running on compatible SoC */
-       if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
-               dev_err(dsaf_dev->dev, "%s v1 chip doesn't support RoCE!\n",
-                       dsaf_dev->ae_dev.name);
-               put_device(&pdev->dev);
-               return -ENODEV;
-       }
-
-       /* do reset or de-reset according to the flag */
-       if (!dereset) {
-               /* reset rocee-channels in dsaf and rocee */
-               dsaf_dev->misc_op->hns_dsaf_srst_chns(dsaf_dev, DSAF_CHNS_MASK,
-                                                     false);
-               dsaf_dev->misc_op->hns_dsaf_roce_srst(dsaf_dev, false);
-       } else {
-               /* configure dsaf tx roce correspond to port map and sl map */
-               mp = dsaf_read_dev(dsaf_dev, DSAF_ROCE_PORT_MAP_REG);
-               for (i = 0; i < DSAF_ROCE_CREDIT_CHN; i++)
-                       dsaf_set_field(mp, 7 << i * 3, i * 3,
-                                      port_map[i][DSAF_ROCE_6PORT_MODE]);
-               dsaf_set_field(mp, 3 << i * 3, i * 3, 0);
-               dsaf_write_dev(dsaf_dev, DSAF_ROCE_PORT_MAP_REG, mp);
-
-               sl = dsaf_read_dev(dsaf_dev, DSAF_ROCE_SL_MAP_REG);
-               for (i = 0; i < DSAF_ROCE_CREDIT_CHN; i++)
-                       dsaf_set_field(sl, 3 << i * 2, i * 2,
-                                      sl_map[i][DSAF_ROCE_6PORT_MODE]);
-               dsaf_write_dev(dsaf_dev, DSAF_ROCE_SL_MAP_REG, sl);
-
-               /* de-reset rocee-channels in dsaf and rocee */
-               dsaf_dev->misc_op->hns_dsaf_srst_chns(dsaf_dev, DSAF_CHNS_MASK,
-                                                     true);
-               msleep(SRST_TIME_INTERVAL);
-               dsaf_dev->misc_op->hns_dsaf_roce_srst(dsaf_dev, true);
-
-               /* enable dsaf channel rocee credit */
-               credit = dsaf_read_dev(dsaf_dev, DSAF_SBM_ROCEE_CFG_REG_REG);
-               dsaf_set_bit(credit, DSAF_SBM_ROCEE_CFG_CRD_EN_B, 0);
-               dsaf_write_dev(dsaf_dev, DSAF_SBM_ROCEE_CFG_REG_REG, credit);
-
-               dsaf_set_bit(credit, DSAF_SBM_ROCEE_CFG_CRD_EN_B, 1);
-               dsaf_write_dev(dsaf_dev, DSAF_SBM_ROCEE_CFG_REG_REG, credit);
-       }
-
-       put_device(&pdev->dev);
-
-       return 0;
-}
-EXPORT_SYMBOL(hns_dsaf_roce_reset);
-
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
 MODULE_DESCRIPTION("HNS DSAF driver");
index 0eb03dff1a8bfc285d5e024c67908821491033bf..c90f41c75500d1ff890b86b2c295a74047a5a371 100644 (file)
@@ -463,6 +463,4 @@ int hns_dsaf_clr_mac_mc_port(struct dsaf_device *dsaf_dev,
                             u8 mac_id, u8 port_num);
 int hns_dsaf_wait_pkt_clean(struct dsaf_device *dsaf_dev, int port);
 
-int hns_dsaf_roce_reset(struct fwnode_handle *dsaf_fwnode, bool dereset);
-
 #endif /* __HNS_DSAF_MAIN_H__ */