]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: socfpga: agilex5: add qspi flash node
authorNiravkumar L Rabara <niravkumar.l.rabara@intel.com>
Wed, 5 Feb 2025 10:11:53 +0000 (18:11 +0800)
committerDinh Nguyen <dinguyen@kernel.org>
Wed, 26 Mar 2025 11:47:04 +0000 (06:47 -0500)
Add Micron qspi nor flash node for Intel SoCFPGA Agilex5.

Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts

index c533e5a3a61064195c82da9a563d6e4382a6a93a..5eda77242c5d0a98c20d337e0bc4fb9620d4f145 100644 (file)
        clock-frequency = <25000000>;
 };
 
+&qspi {
+       status = "okay";
+       flash@0 {
+               compatible = "micron,mt25qu02g", "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <100000000>;
+               m25p,fast-read;
+               cdns,read-delay = <2>;
+               cdns,tshsl-ns = <50>;
+               cdns,tsd2d-ns = <50>;
+               cdns,tchsh-ns = <4>;
+               cdns,tslch-ns = <4>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       qspi_boot: partition@0 {
+                               label = "u-boot";
+                               reg = <0x0 0x04200000>;
+                       };
+
+                       root: partition@4200000 {
+                               label = "root";
+                               reg = <0x04200000 0x0be00000>;
+                       };
+               };
+       };
+};
+
 &uart0 {
        status = "okay";
 };