+++ /dev/null
-From d6f0f39b7d05e62b347c4352d070e4afb3ade4b5 Mon Sep 17 00:00:00 2001
-From: Suresh Siddha <suresh.b.siddha@intel.com>
-Date: Tue, 4 Nov 2008 13:53:04 -0800
-Subject: x86: add smp_mb() before sending INVALIDATE_TLB_VECTOR
-
-From: Suresh Siddha <suresh.b.siddha@intel.com>
-
-commit d6f0f39b7d05e62b347c4352d070e4afb3ade4b5 upstream.
-
-Impact: fix rare x2apic hang
-
-On x86, x2apic mode accesses for sending IPI's don't have serializing
-semantics. If the IPI receivner refers(in lock-free fashion) to some
-memory setup by the sender, the need for smp_mb() before sending the
-IPI becomes critical in x2apic mode.
-
-Add the smp_mb() in native_flush_tlb_others() before sending the IPI.
-
-Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
-Signed-off-by: Ingo Molnar <mingo@elte.hu>
-Cc: Thomas Renninger <trenn@novell.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-
----
- arch/x86/kernel/tlb_32.c | 6 ++++++
- arch/x86/kernel/tlb_64.c | 5 +++++
- 2 files changed, 11 insertions(+)
-
---- a/arch/x86/kernel/tlb_32.c
-+++ b/arch/x86/kernel/tlb_32.c
-@@ -154,6 +154,12 @@ void native_flush_tlb_others(const cpuma
- flush_mm = mm;
- flush_va = va;
- cpus_or(flush_cpumask, cpumask, flush_cpumask);
-+
-+ /*
-+ * Make the above memory operations globally visible before
-+ * sending the IPI.
-+ */
-+ smp_mb();
- /*
- * We have to send the IPI only to
- * CPUs affected.
---- a/arch/x86/kernel/tlb_64.c
-+++ b/arch/x86/kernel/tlb_64.c
-@@ -183,6 +183,11 @@ void native_flush_tlb_others(const cpuma
- cpus_or(f->flush_cpumask, cpumask, f->flush_cpumask);
-
- /*
-+ * Make the above memory operations globally visible before
-+ * sending the IPI.
-+ */
-+ smp_mb();
-+ /*
- * We have to send the IPI only to
- * CPUs affected.
- */