--- /dev/null
+From 02d27234759dc4fe14a880ec1e1dee108cb0b503 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Thu, 3 Mar 2016 19:34:28 -0500
+Subject: drm/amdgpu/dp: add back special handling for NUTMEG
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 02d27234759dc4fe14a880ec1e1dee108cb0b503 upstream.
+
+When I fixed the dp rate selection in:
+3b73b168cffd9c392584d3f665021fa2190f8612
+drm/amdgpu: fix dp link rate selection (v2)
+I accidently dropped the special handling for NUTMEG
+DP bridge chips. They require a fixed link rate.
+
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
+Reviewed-by: Harry Wentland <harry.wentland@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/atombios_dp.c | 20 ++++++++++++++++----
+ 1 file changed, 16 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
++++ b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
+@@ -265,15 +265,27 @@ static int amdgpu_atombios_dp_get_dp_lin
+ unsigned max_lane_num = drm_dp_max_lane_count(dpcd);
+ unsigned lane_num, i, max_pix_clock;
+
+- for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
+- for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) {
+- max_pix_clock = (lane_num * link_rates[i] * 8) / bpp;
++ if (amdgpu_connector_encoder_get_dp_bridge_encoder_id(connector) ==
++ ENCODER_OBJECT_ID_NUTMEG) {
++ for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
++ max_pix_clock = (lane_num * 270000 * 8) / bpp;
+ if (max_pix_clock >= pix_clock) {
+ *dp_lanes = lane_num;
+- *dp_rate = link_rates[i];
++ *dp_rate = 270000;
+ return 0;
+ }
+ }
++ } else {
++ for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
++ for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) {
++ max_pix_clock = (lane_num * link_rates[i] * 8) / bpp;
++ if (max_pix_clock >= pix_clock) {
++ *dp_lanes = lane_num;
++ *dp_rate = link_rates[i];
++ return 0;
++ }
++ }
++ }
+ }
+
+ return -EINVAL;
--- /dev/null
+From c47b9e0944e483309d66c807d650ac8b8ceafb57 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 11 May 2016 16:21:03 -0400
+Subject: drm/amdgpu: fix DP mode validation
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit c47b9e0944e483309d66c807d650ac8b8ceafb57 upstream.
+
+Switch the order of the loops to walk the rates on the top
+so we exhaust all DP 1.1 rate/lane combinations before trying
+DP 1.2 rate/lane combos.
+
+This avoids selecting rates that are supported by the monitor,
+but not the connector leading to valid modes getting rejected.
+
+bug:
+https://bugs.freedesktop.org/show_bug.cgi?id=95206
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/atombios_dp.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
++++ b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
+@@ -276,8 +276,8 @@ static int amdgpu_atombios_dp_get_dp_lin
+ }
+ }
+ } else {
+- for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
+- for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) {
++ for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) {
++ for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
+ max_pix_clock = (lane_num * link_rates[i] * 8) / bpp;
+ if (max_pix_clock >= pix_clock) {
+ *dp_lanes = lane_num;
--- /dev/null
+From c8213a638f65bf487c10593c216525952cca3690 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Thu, 3 Mar 2016 19:26:24 -0500
+Subject: drm/radeon/dp: add back special handling for NUTMEG
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit c8213a638f65bf487c10593c216525952cca3690 upstream.
+
+When I fixed the dp rate selection in:
+092c96a8ab9d1bd60ada2ed385cc364ce084180e
+drm/radeon: fix dp link rate selection (v2)
+I accidently dropped the special handling for NUTMEG
+DP bridge chips. They require a fixed link rate.
+
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
+Reviewed-by: Harry Wentland <harry.wentland@amd.com>
+Tested-by: Ken Moffat <zarniwhoop@ntlworld.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/atombios_dp.c | 20 ++++++++++++++++----
+ 1 file changed, 16 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/atombios_dp.c
++++ b/drivers/gpu/drm/radeon/atombios_dp.c
+@@ -315,15 +315,27 @@ int radeon_dp_get_dp_link_config(struct
+ unsigned max_lane_num = drm_dp_max_lane_count(dpcd);
+ unsigned lane_num, i, max_pix_clock;
+
+- for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
+- for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) {
+- max_pix_clock = (lane_num * link_rates[i] * 8) / bpp;
++ if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) ==
++ ENCODER_OBJECT_ID_NUTMEG) {
++ for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
++ max_pix_clock = (lane_num * 270000 * 8) / bpp;
+ if (max_pix_clock >= pix_clock) {
+ *dp_lanes = lane_num;
+- *dp_rate = link_rates[i];
++ *dp_rate = 270000;
+ return 0;
+ }
+ }
++ } else {
++ for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
++ for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) {
++ max_pix_clock = (lane_num * link_rates[i] * 8) / bpp;
++ if (max_pix_clock >= pix_clock) {
++ *dp_lanes = lane_num;
++ *dp_rate = link_rates[i];
++ return 0;
++ }
++ }
++ }
+ }
+
+ return -EINVAL;
--- /dev/null
+From ff0bd441bdfbfa09d05fdba9829a0401a46635c1 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 11 May 2016 16:16:53 -0400
+Subject: drm/radeon: fix DP mode validation
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit ff0bd441bdfbfa09d05fdba9829a0401a46635c1 upstream.
+
+Switch the order of the loops to walk the rates on the top
+so we exhaust all DP 1.1 rate/lane combinations before trying
+DP 1.2 rate/lane combos.
+
+This avoids selecting rates that are supported by the monitor,
+but not the connector leading to valid modes getting rejected.
+
+bug:
+https://bugs.freedesktop.org/show_bug.cgi?id=95206
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/atombios_dp.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/atombios_dp.c
++++ b/drivers/gpu/drm/radeon/atombios_dp.c
+@@ -326,8 +326,8 @@ int radeon_dp_get_dp_link_config(struct
+ }
+ }
+ } else {
+- for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
+- for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) {
++ for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) {
++ for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
+ max_pix_clock = (lane_num * link_rates[i] * 8) / bpp;
+ if (max_pix_clock >= pix_clock) {
+ *dp_lanes = lane_num;
--- /dev/null
+From 91e4f1b6073dd680d86cdb7e42d7cccca9db39d8 Mon Sep 17 00:00:00 2001
+From: James Hogan <james.hogan@imgtec.com>
+Date: Thu, 15 Sep 2016 17:20:06 +0100
+Subject: KVM: MIPS: Drop other CPU ASIDs on guest MMU changes
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: James Hogan <james.hogan@imgtec.com>
+
+commit 91e4f1b6073dd680d86cdb7e42d7cccca9db39d8 upstream.
+
+When a guest TLB entry is replaced by TLBWI or TLBWR, we only invalidate
+TLB entries on the local CPU. This doesn't work correctly on an SMP host
+when the guest is migrated to a different physical CPU, as it could pick
+up stale TLB mappings from the last time the vCPU ran on that physical
+CPU.
+
+Therefore invalidate both user and kernel host ASIDs on other CPUs,
+which will cause new ASIDs to be generated when it next runs on those
+CPUs.
+
+We're careful only to do this if the TLB entry was already valid, and
+only for the kernel ASID where the virtual address it mapped is outside
+of the guest user address range.
+
+Signed-off-by: James Hogan <james.hogan@imgtec.com>
+Cc: Paolo Bonzini <pbonzini@redhat.com>
+Cc: "Radim Krčmář" <rkrcmar@redhat.com>
+Cc: Ralf Baechle <ralf@linux-mips.org>
+Cc: linux-mips@linux-mips.org
+Cc: kvm@vger.kernel.org
+Cc: <stable@vger.kernel.org> # 3.17.x-
+[james.hogan@imgtec.com: Backport to 3.17..4.4]
+Signed-off-by: James Hogan <james.hogan@imgtec.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/mips/kvm/emulate.c | 63 ++++++++++++++++++++++++++++++++++++++++--------
+ 1 file changed, 53 insertions(+), 10 deletions(-)
+
+--- a/arch/mips/kvm/emulate.c
++++ b/arch/mips/kvm/emulate.c
+@@ -807,6 +807,47 @@ enum emulation_result kvm_mips_emul_tlbr
+ return EMULATE_FAIL;
+ }
+
++/**
++ * kvm_mips_invalidate_guest_tlb() - Indicates a change in guest MMU map.
++ * @vcpu: VCPU with changed mappings.
++ * @tlb: TLB entry being removed.
++ *
++ * This is called to indicate a single change in guest MMU mappings, so that we
++ * can arrange TLB flushes on this and other CPUs.
++ */
++static void kvm_mips_invalidate_guest_tlb(struct kvm_vcpu *vcpu,
++ struct kvm_mips_tlb *tlb)
++{
++ int cpu, i;
++ bool user;
++
++ /* No need to flush for entries which are already invalid */
++ if (!((tlb->tlb_lo0 | tlb->tlb_lo1) & MIPS3_PG_V))
++ return;
++ /* User address space doesn't need flushing for KSeg2/3 changes */
++ user = tlb->tlb_hi < KVM_GUEST_KSEG0;
++
++ preempt_disable();
++
++ /*
++ * Probe the shadow host TLB for the entry being overwritten, if one
++ * matches, invalidate it
++ */
++ kvm_mips_host_tlb_inv(vcpu, tlb->tlb_hi);
++
++ /* Invalidate the whole ASID on other CPUs */
++ cpu = smp_processor_id();
++ for_each_possible_cpu(i) {
++ if (i == cpu)
++ continue;
++ if (user)
++ vcpu->arch.guest_user_asid[i] = 0;
++ vcpu->arch.guest_kernel_asid[i] = 0;
++ }
++
++ preempt_enable();
++}
++
+ /* Write Guest TLB Entry @ Index */
+ enum emulation_result kvm_mips_emul_tlbwi(struct kvm_vcpu *vcpu)
+ {
+@@ -826,11 +867,8 @@ enum emulation_result kvm_mips_emul_tlbw
+ }
+
+ tlb = &vcpu->arch.guest_tlb[index];
+- /*
+- * Probe the shadow host TLB for the entry being overwritten, if one
+- * matches, invalidate it
+- */
+- kvm_mips_host_tlb_inv(vcpu, tlb->tlb_hi);
++
++ kvm_mips_invalidate_guest_tlb(vcpu, tlb);
+
+ tlb->tlb_mask = kvm_read_c0_guest_pagemask(cop0);
+ tlb->tlb_hi = kvm_read_c0_guest_entryhi(cop0);
+@@ -859,11 +897,7 @@ enum emulation_result kvm_mips_emul_tlbw
+
+ tlb = &vcpu->arch.guest_tlb[index];
+
+- /*
+- * Probe the shadow host TLB for the entry being overwritten, if one
+- * matches, invalidate it
+- */
+- kvm_mips_host_tlb_inv(vcpu, tlb->tlb_hi);
++ kvm_mips_invalidate_guest_tlb(vcpu, tlb);
+
+ tlb->tlb_mask = kvm_read_c0_guest_pagemask(cop0);
+ tlb->tlb_hi = kvm_read_c0_guest_entryhi(cop0);
+@@ -982,6 +1016,7 @@ enum emulation_result kvm_mips_emulate_C
+ int32_t rt, rd, copz, sel, co_bit, op;
+ uint32_t pc = vcpu->arch.pc;
+ unsigned long curr_pc;
++ int cpu, i;
+
+ /*
+ * Update PC and hold onto current PC in case there is
+@@ -1089,8 +1124,16 @@ enum emulation_result kvm_mips_emulate_C
+ vcpu->arch.gprs[rt]
+ & ASID_MASK);
+
++ preempt_disable();
+ /* Blow away the shadow host TLBs */
+ kvm_mips_flush_host_tlb(1);
++ cpu = smp_processor_id();
++ for_each_possible_cpu(i)
++ if (i != cpu) {
++ vcpu->arch.guest_user_asid[i] = 0;
++ vcpu->arch.guest_kernel_asid[i] = 0;
++ }
++ preempt_enable();
+ }
+ kvm_write_c0_guest_entryhi(cop0,
+ vcpu->arch.gprs[rt]);
--- /dev/null
+From aaaab56dba9af4fe75461e0ee13231c1a6ea174d Mon Sep 17 00:00:00 2001
+From: Stephen Rothwell <sfr@canb.auug.org.au>
+Date: Tue, 31 May 2016 09:38:56 +1000
+Subject: of: silence warnings due to max() usage
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Stephen Rothwell <sfr@canb.auug.org.au>
+
+commit aaaab56dba9af4fe75461e0ee13231c1a6ea174d upstream.
+
+pageblock_order can be (at least) an unsigned int or an unsigned long
+depending on the kernel config and architecture, so use max_t(unsigned
+long ...) when comparing it.
+
+fixes these warnings:
+
+In file included from include/linux/list.h:8:0,
+ from include/linux/kobject.h:20,
+ from include/linux/of.h:21,
+ from drivers/of/of_reserved_mem.c:17:
+drivers/of/of_reserved_mem.c: In function ‘__reserved_mem_alloc_size’:
+include/linux/kernel.h:748:17: warning: comparison of distinct pointer types lacks a cast
+ (void) (&_max1 == &_max2); \
+ ^
+include/linux/kernel.h:747:9: note: in definition of macro ‘max’
+ typeof(y) _max2 = (y); \
+ ^
+drivers/of/of_reserved_mem.c:131:48: note: in expansion of macro ‘max’
+ align = max(align, (phys_addr_t)PAGE_SIZE << max(MAX_ORDER - 1, pageblock_ord
+ ^
+include/linux/kernel.h:748:17: warning: comparison of distinct pointer types lacks a cast
+ (void) (&_max1 == &_max2); \
+ ^
+include/linux/kernel.h:747:21: note: in definition of macro ‘max’
+ typeof(y) _max2 = (y); \
+ ^
+drivers/of/of_reserved_mem.c:131:48: note: in expansion of macro ‘max’
+ align = max(align, (phys_addr_t)PAGE_SIZE << max(MAX_ORDER - 1, pageblock_ord
+ ^
+
+Fixes: 1cc8e3458b51 ("drivers: of: of_reserved_mem: fixup the alignment with CMA setup")
+Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
+Signed-off-by: Rob Herring <robh@kernel.org>
+Cc: Arnd Bergmann <arnd@arndb.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/of/of_reserved_mem.c | 8 ++++++--
+ 1 file changed, 6 insertions(+), 2 deletions(-)
+
+--- a/drivers/of/of_reserved_mem.c
++++ b/drivers/of/of_reserved_mem.c
+@@ -127,8 +127,12 @@ static int __init __reserved_mem_alloc_s
+ }
+
+ /* Need adjust the alignment to satisfy the CMA requirement */
+- if (IS_ENABLED(CONFIG_CMA) && of_flat_dt_is_compatible(node, "shared-dma-pool"))
+- align = max(align, (phys_addr_t)PAGE_SIZE << max(MAX_ORDER - 1, pageblock_order));
++ if (IS_ENABLED(CONFIG_CMA) && of_flat_dt_is_compatible(node, "shared-dma-pool")) {
++ unsigned long order =
++ max_t(unsigned long, MAX_ORDER - 1, pageblock_order);
++
++ align = max(align, (phys_addr_t)PAGE_SIZE << order);
++ }
+
+ prop = of_get_flat_dt_prop(node, "alloc-ranges", &len);
+ if (prop) {
--- /dev/null
+From foo@baz Sun Nov 13 12:16:15 CET 2016
+Date: Sun, 13 Nov 2016 12:16:15 +0100
+To: Greg KH <gregkh@linuxfoundation.org>
+From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Subject: Revert KVM: MIPS: Drop other CPU ASIDs on guest MMU changes
+
+This reverts commit d450527ad04ad180636679aeb3161ec58079f1ba which was
+commit 91e4f1b6073dd680d86cdb7e42d7cccca9db39d8 upstream as it was
+incorrect. A fixed version will be forthcoming.
+
+Reported-by: James Hogan <james.hogan@imgtec.com>
+Cc: Paolo Bonzini <pbonzini@redhat.com>
+Cc: "Radim Krčmář" <rkrcmar@redhat.com>
+Cc: Ralf Baechle <ralf@linux-mips.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/mips/kvm/emulate.c | 63 +++++++-----------------------------------------
+ 1 file changed, 10 insertions(+), 53 deletions(-)
+
+--- a/arch/mips/kvm/emulate.c
++++ b/arch/mips/kvm/emulate.c
+@@ -807,47 +807,6 @@ enum emulation_result kvm_mips_emul_tlbr
+ return EMULATE_FAIL;
+ }
+
+-/**
+- * kvm_mips_invalidate_guest_tlb() - Indicates a change in guest MMU map.
+- * @vcpu: VCPU with changed mappings.
+- * @tlb: TLB entry being removed.
+- *
+- * This is called to indicate a single change in guest MMU mappings, so that we
+- * can arrange TLB flushes on this and other CPUs.
+- */
+-static void kvm_mips_invalidate_guest_tlb(struct kvm_vcpu *vcpu,
+- struct kvm_mips_tlb *tlb)
+-{
+- int cpu, i;
+- bool user;
+-
+- /* No need to flush for entries which are already invalid */
+- if (!((tlb->tlb_lo[0] | tlb->tlb_lo[1]) & ENTRYLO_V))
+- return;
+- /* User address space doesn't need flushing for KSeg2/3 changes */
+- user = tlb->tlb_hi < KVM_GUEST_KSEG0;
+-
+- preempt_disable();
+-
+- /*
+- * Probe the shadow host TLB for the entry being overwritten, if one
+- * matches, invalidate it
+- */
+- kvm_mips_host_tlb_inv(vcpu, tlb->tlb_hi);
+-
+- /* Invalidate the whole ASID on other CPUs */
+- cpu = smp_processor_id();
+- for_each_possible_cpu(i) {
+- if (i == cpu)
+- continue;
+- if (user)
+- vcpu->arch.guest_user_asid[i] = 0;
+- vcpu->arch.guest_kernel_asid[i] = 0;
+- }
+-
+- preempt_enable();
+-}
+-
+ /* Write Guest TLB Entry @ Index */
+ enum emulation_result kvm_mips_emul_tlbwi(struct kvm_vcpu *vcpu)
+ {
+@@ -867,8 +826,11 @@ enum emulation_result kvm_mips_emul_tlbw
+ }
+
+ tlb = &vcpu->arch.guest_tlb[index];
+-
+- kvm_mips_invalidate_guest_tlb(vcpu, tlb);
++ /*
++ * Probe the shadow host TLB for the entry being overwritten, if one
++ * matches, invalidate it
++ */
++ kvm_mips_host_tlb_inv(vcpu, tlb->tlb_hi);
+
+ tlb->tlb_mask = kvm_read_c0_guest_pagemask(cop0);
+ tlb->tlb_hi = kvm_read_c0_guest_entryhi(cop0);
+@@ -897,7 +859,11 @@ enum emulation_result kvm_mips_emul_tlbw
+
+ tlb = &vcpu->arch.guest_tlb[index];
+
+- kvm_mips_invalidate_guest_tlb(vcpu, tlb);
++ /*
++ * Probe the shadow host TLB for the entry being overwritten, if one
++ * matches, invalidate it
++ */
++ kvm_mips_host_tlb_inv(vcpu, tlb->tlb_hi);
+
+ tlb->tlb_mask = kvm_read_c0_guest_pagemask(cop0);
+ tlb->tlb_hi = kvm_read_c0_guest_entryhi(cop0);
+@@ -1016,7 +982,6 @@ enum emulation_result kvm_mips_emulate_C
+ int32_t rt, rd, copz, sel, co_bit, op;
+ uint32_t pc = vcpu->arch.pc;
+ unsigned long curr_pc;
+- int cpu, i;
+
+ /*
+ * Update PC and hold onto current PC in case there is
+@@ -1124,16 +1089,8 @@ enum emulation_result kvm_mips_emulate_C
+ vcpu->arch.gprs[rt]
+ & ASID_MASK);
+
+- preempt_disable();
+ /* Blow away the shadow host TLBs */
+ kvm_mips_flush_host_tlb(1);
+- cpu = smp_processor_id();
+- for_each_possible_cpu(i)
+- if (i != cpu) {
+- vcpu->arch.guest_user_asid[i] = 0;
+- vcpu->arch.guest_kernel_asid[i] = 0;
+- }
+- preempt_enable();
+ }
+ kvm_write_c0_guest_entryhi(cop0,
+ vcpu->arch.gprs[rt]);
net-sched-filters-fix-notification-of-filter-delete-with-proper-handle.patch
sctp-validate-chunk-len-before-actually-using-it.patch
packet-on-direct_xmit-limit-tso-and-csum-to-supported-devices.patch
+of-silence-warnings-due-to-max-usage.patch
+revert-kvm-mips-drop-other-cpu-asids-on-guest-mmu-changes.patch
+kvm-mips-drop-other-cpu-asids-on-guest-mmu-changes.patch
+drm-amdgpu-dp-add-back-special-handling-for-nutmeg.patch
+drm-amdgpu-fix-dp-mode-validation.patch
+drm-radeon-dp-add-back-special-handling-for-nutmeg.patch
+drm-radeon-fix-dp-mode-validation.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
