]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
net: txgbe: support RX desc merge mode
authorJiawen Wu <jiawenwu@trustnetic.com>
Thu, 23 Oct 2025 01:45:36 +0000 (09:45 +0800)
committerPaolo Abeni <pabeni@redhat.com>
Tue, 28 Oct 2025 09:44:16 +0000 (10:44 +0100)
RX descriptor merge mode is supported on AML devices. When it is
enabled, the hardware process the RX descriptors in batches.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Link: https://patch.msgid.link/20251023014538.12644-2-jiawenwu@trustnetic.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
drivers/net/ethernet/wangxun/libwx/wx_hw.c
drivers/net/ethernet/wangxun/libwx/wx_type.h
drivers/net/ethernet/wangxun/libwx/wx_vf.h
drivers/net/ethernet/wangxun/libwx/wx_vf_lib.c
drivers/net/ethernet/wangxun/txgbe/txgbe_main.c
drivers/net/ethernet/wangxun/txgbevf/txgbevf_main.c

index 1e2713f0c9212f9f9f17cd3de6ee86181ffea3d6..2dbbb42aa9c0126c343a69702a19eca66f027dca 100644 (file)
@@ -1935,6 +1935,10 @@ static void wx_configure_rx_ring(struct wx *wx,
                rxdctl |= (ring->count / 128) << WX_PX_RR_CFG_RR_SIZE_SHIFT;
 
        rxdctl |= 0x1 << WX_PX_RR_CFG_RR_THER_SHIFT;
+
+       if (test_bit(WX_FLAG_RX_MERGE_ENABLED, wx->flags))
+               rxdctl |= WX_PX_RR_CFG_DESC_MERGE;
+
        wr32(wx, WX_PX_RR_CFG(reg_idx), rxdctl);
 
        /* reset head and tail pointers */
@@ -2190,6 +2194,12 @@ void wx_configure_rx(struct wx *wx)
        /* set_rx_buffer_len must be called before ring initialization */
        wx_set_rx_buffer_len(wx);
 
+       if (test_bit(WX_FLAG_RX_MERGE_ENABLED, wx->flags)) {
+               wr32(wx, WX_RDM_DCACHE_CTL, WX_RDM_DCACHE_CTL_EN);
+               wr32m(wx, WX_RDM_RSC_CTL,
+                     WX_RDM_RSC_CTL_FREE_CTL | WX_RDM_RSC_CTL_FREE_CNT_DIS,
+                     WX_RDM_RSC_CTL_FREE_CTL);
+       }
        /* Setup the HW Rx Head and Tail Descriptor Pointers and
         * the Base and Length of the Rx Descriptor Ring
         */
index 4880268b620e1b35e7c8748dbf7d23450c25beaa..eb3f32551c14bb6be4133d57c2b14dc866a0b860 100644 (file)
 
 /*********************** Receive DMA registers **************************/
 #define WX_RDM_VF_RE(_i)             (0x12004 + ((_i) * 4))
+#define WX_RDM_RSC_CTL               0x1200C
+#define WX_RDM_RSC_CTL_FREE_CNT_DIS  BIT(8)
+#define WX_RDM_RSC_CTL_FREE_CTL      BIT(7)
 #define WX_RDM_PF_QDE(_i)            (0x12080 + ((_i) * 4))
 #define WX_RDM_VFRE_CLR(_i)          (0x120A0 + ((_i) * 4))
+#define WX_RDM_DCACHE_CTL            0x120A8
+#define WX_RDM_DCACHE_CTL_EN         BIT(0)
 #define WX_RDM_DRP_PKT               0x12500
 #define WX_RDM_PKT_CNT               0x12504
 #define WX_RDM_BYTE_CNT_LSB          0x12508
@@ -447,6 +452,7 @@ enum WX_MSCA_CMD_value {
 #define WX_PX_RR_CFG_VLAN            BIT(31)
 #define WX_PX_RR_CFG_DROP_EN         BIT(30)
 #define WX_PX_RR_CFG_SPLIT_MODE      BIT(26)
+#define WX_PX_RR_CFG_DESC_MERGE      BIT(19)
 #define WX_PX_RR_CFG_RR_THER_SHIFT   16
 #define WX_PX_RR_CFG_RR_HDR_SZ       GENMASK(15, 12)
 #define WX_PX_RR_CFG_RR_BUF_SZ       GENMASK(11, 8)
@@ -1232,6 +1238,7 @@ enum wx_pf_flags {
        WX_FLAG_NEED_SFP_RESET,
        WX_FLAG_NEED_UPDATE_LINK,
        WX_FLAG_NEED_DO_RESET,
+       WX_FLAG_RX_MERGE_ENABLED,
        WX_PF_FLAGS_NBITS               /* must be last */
 };
 
index 3f16de0fa42726c712deb2ee5a54d60cb79a30ef..ecb19859239365710b261e33e44c0118ecacd15a 100644 (file)
@@ -74,6 +74,7 @@
 #define WX_VXRXDCTL_BUFSZ(f)     FIELD_PREP(GENMASK(11, 8), f)
 #define WX_VXRXDCTL_HDRSZ_MASK   GENMASK(15, 12)
 #define WX_VXRXDCTL_HDRSZ(f)     FIELD_PREP(GENMASK(15, 12), f)
+#define WX_VXRXDCTL_DESC_MERGE   BIT(19)
 #define WX_VXRXDCTL_RSCMAX_MASK  GENMASK(24, 23)
 #define WX_VXRXDCTL_RSCMAX(f)    FIELD_PREP(GENMASK(24, 23), f)
 #define WX_VXRXDCTL_RSCEN        BIT(29)
index a87887b9f8ee345e326d298fa203719cf2c46410..f54107f3c6d7f8c68815190f78afd16ccfb0291a 100644 (file)
@@ -272,6 +272,9 @@ void wx_configure_rx_ring_vf(struct wx *wx, struct wx_ring *ring)
        rxdctl |= WX_VXRXDCTL_RSCMAX(0);
        rxdctl |= WX_VXRXDCTL_RSCEN;
 
+       if (test_bit(WX_FLAG_RX_MERGE_ENABLED, wx->flags))
+               rxdctl |= WX_VXRXDCTL_DESC_MERGE;
+
        wr32(wx, WX_VXRXDCTL(reg_idx), rxdctl);
 
        /* pf/vf reuse */
index c4c4d70d8466a8ada27c35a4235deb2d1b6cbbc8..60a04c5a76782ccfb59ff977d81f1a8f853beb7f 100644 (file)
@@ -423,6 +423,7 @@ static int txgbe_sw_init(struct wx *wx)
                break;
        case wx_mac_aml:
        case wx_mac_aml40:
+               set_bit(WX_FLAG_RX_MERGE_ENABLED, wx->flags);
                set_bit(WX_FLAG_SWFW_RING, wx->flags);
                wx->swfw_index = 0;
                break;
index 72663e3c4205a2896bee21d01babddb71131b920..52c1e223bbd781f22145e567004e839f980cb6ae 100644 (file)
@@ -157,6 +157,17 @@ static int txgbevf_sw_init(struct wx *wx)
 
        wx->set_num_queues = txgbevf_set_num_queues;
 
+       switch (wx->mac.type) {
+       case wx_mac_sp:
+               break;
+       case wx_mac_aml:
+       case wx_mac_aml40:
+               set_bit(WX_FLAG_RX_MERGE_ENABLED, wx->flags);
+               break;
+       default:
+               break;
+       }
+
        return 0;
 err_reset_hw:
        kfree(wx->vfinfo);