RISC-V: Cleanup the imply code and test cases for vendor xsf extensions.

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index ccece9506641954bfc8dd4e50a696e446d2e02a0..a609781bc04590aa124a3626068d4e7cd69ccf56 100644 (file)
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1188,7 +1188,6 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
 
   {"xsfvcp", "+zve32x", check_implicit_always},
   {"xsfvqmaccqoq", "+zve32x,+zvl256b", check_implicit_always},
-  {"xsfvqmaccqoq", "+zvl256b", check_implicit_always},
   {"xsfvqmaccdod", "+zve32x,+zvl128b", check_implicit_always},
   {"xsfvfnrclipxfqf", "+zve32f", check_implicit_always},
 

diff --git a/gas/testsuite/gas/riscv/imply.d b/gas/testsuite/gas/riscv/imply.d
index 474694d9071cc7a9c3f7500e6d4b22b4e6540068..8337bd33e8f6359533e8902e26f94e02068da9ad 100644 (file)
--- a/gas/testsuite/gas/riscv/imply.d
+++ b/gas/testsuite/gas/riscv/imply.d
@@ -19,6 +19,9 @@ SYMBOL TABLE:
 [0-9a-f]+ l       .text        0+000 \$xrv32i2p1_zaamo1p0_zacas1p0
 [0-9a-f]+ l       .text        0+000 \$xrv32i2p1_a2p1_zaamo1p0_zalrsc1p0
 [0-9a-f]+ l       .text        0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl32b1p0_xsfvcp1p0
+[0-9a-f]+ l       .text        0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl64b1p0_xsfvqmaccqoq1p0
+[0-9a-f]+ l       .text        0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0_xsfvqmaccdod1p0
+[0-9a-f]+ l       .text        0+000 \$xrv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvl32b1p0_xsfvfnrclipxfqf1p0
 [0-9a-f]+ l       .text        0+000 \$xrv32i2p1_f2p2_d2p2_v1p0_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0
 [0-9a-f]+ l       .text        0+000 \$xrv32i2p1_f2p2_zicsr2p0_zfhmin1p0_zve32f1p0_zve32x1p0_zvfh1p0_zvfhmin1p0_zvl32b1p0
 [0-9a-f]+ l       .text        0+000 \$xrv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfhmin1p0_zvl32b1p0

diff --git a/gas/testsuite/gas/riscv/imply.s b/gas/testsuite/gas/riscv/imply.s
index 790c6f335ee3d0906c76f58d2e25f06da96410d4..2ef14ab67132d3311b0062c7b59ad631686e679e 100644 (file)
--- a/gas/testsuite/gas/riscv/imply.s
+++ b/gas/testsuite/gas/riscv/imply.s
@@ -21,6 +21,10 @@ imply zacas
 imply a
 
 imply xsfvcp
+imply xsfvqmaccqoq
+imply xsfvqmaccdod
+imply xsfvfnrclipxfqf
+
 imply v
 imply zvfh
 imply zvfhmin

diff --git a/gas/testsuite/gas/riscv/march-imply-xsfvfnrclipxfqf.d b/gas/testsuite/gas/riscv/march-imply-xsfvfnrclipxfqf.d
deleted file mode 100644 (file)
index e77fee0..0000000
--- a/gas/testsuite/gas/riscv/march-imply-xsfvfnrclipxfqf.d
+++ /dev/null
@@ -1,6 +0,0 @@
-#as: -march=rv32i_xsfvfnrclipxfqf -march-attr -misa-spec=20191213
-#readelf: -A
-#source: empty.s
-Attribute Section: riscv
-File Attributes
-  Tag_RISCV_arch: "rv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvl32b1p0_xsfvfnrclipxfqf1p0"

diff --git a/gas/testsuite/gas/riscv/march-imply-xsfvqmaccdod.d b/gas/testsuite/gas/riscv/march-imply-xsfvqmaccdod.d
deleted file mode 100644 (file)
index 47e91f8..0000000
--- a/gas/testsuite/gas/riscv/march-imply-xsfvqmaccdod.d
+++ /dev/null
@@ -1,6 +0,0 @@
-#as: -march=rv32i_xsfvqmaccdod -march-attr -misa-spec=20191213
-#readelf: -A
-#source: empty.s
-Attribute Section: riscv
-File Attributes
-  Tag_RISCV_arch: "rv32i2p1_zicsr2p0_zve32x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0_xsfvqmaccdod1p0"

diff --git a/gas/testsuite/gas/riscv/march-imply-xsfvqmaccqoq.d b/gas/testsuite/gas/riscv/march-imply-xsfvqmaccqoq.d
deleted file mode 100644 (file)
index 784a8ac..0000000
--- a/gas/testsuite/gas/riscv/march-imply-xsfvqmaccqoq.d
+++ /dev/null
@@ -1,6 +0,0 @@
-#as: -march=rv32i_xsfvqmaccqoq -march-attr -misa-spec=20191213
-#readelf: -A
-#source: empty.s
-Attribute Section: riscv
-File Attributes
-  Tag_RISCV_arch: "rv32i2p1_zicsr2p0_zve32x1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl64b1p0_xsfvqmaccqoq1p0"