--- /dev/null
+From b53893aae441a034bf4dbbad42fe218561d7d81f Mon Sep 17 00:00:00 2001
+From: Michael Walle <michael@walle.cc>
+Date: Tue, 19 Jul 2016 16:43:26 +0200
+Subject: hwmon: (adt7411) set bit 3 in CFG1 register
+
+From: Michael Walle <michael@walle.cc>
+
+commit b53893aae441a034bf4dbbad42fe218561d7d81f upstream.
+
+According to the datasheet you should only write 1 to this bit. If it is
+not set, at least AIN3 will return bad values on newer silicon revisions.
+
+Fixes: d84ca5b345c2 ("hwmon: Add driver for ADT7411 voltage and temperature sensor")
+Signed-off-by: Michael Walle <michael@walle.cc>
+Signed-off-by: Guenter Roeck <linux@roeck-us.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/hwmon/adt7411.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/drivers/hwmon/adt7411.c
++++ b/drivers/hwmon/adt7411.c
+@@ -30,6 +30,7 @@
+
+ #define ADT7411_REG_CFG1 0x18
+ #define ADT7411_CFG1_START_MONITOR (1 << 0)
++#define ADT7411_CFG1_RESERVED_BIT3 (1 << 3)
+
+ #define ADT7411_REG_CFG2 0x19
+ #define ADT7411_CFG2_DISABLE_AVG (1 << 5)
+@@ -296,8 +297,10 @@ static int adt7411_probe(struct i2c_clie
+ mutex_init(&data->device_lock);
+ mutex_init(&data->update_lock);
+
++ /* According to the datasheet, we must only write 1 to bit 3 */
+ ret = adt7411_modify_bit(client, ADT7411_REG_CFG1,
+- ADT7411_CFG1_START_MONITOR, 1);
++ ADT7411_CFG1_RESERVED_BIT3
++ | ADT7411_CFG1_START_MONITOR, 1);
+ if (ret < 0)
+ return ret;
+
--- /dev/null
+From 4f6aa3264af4d44caaa649dd3ff1fe98f5817251 Mon Sep 17 00:00:00 2001
+From: Jon Hunter <jonathanh@nvidia.com>
+Date: Tue, 12 Jul 2016 14:53:37 +0100
+Subject: mmc: tegra: Only advertise UHS modes if IO regulator is present
+
+From: Jon Hunter <jonathanh@nvidia.com>
+
+commit 4f6aa3264af4d44caaa649dd3ff1fe98f5817251 upstream.
+
+To support UHS modes for Tegra an external regulator must be present
+to adjust the IO voltage accordingly. Even if the regulator is not
+present but the host supports the UHS modes and the device supports the
+UHS modes, then we will attempt to switch to a high-speed mode. Without
+an external regulator, Tegra will fail to switch to the high-speed
+mode.
+
+It has been found that with some SD cards, that once it has been switch
+to operate at a high-speed mode, all subsequent commands issues to the
+card will fail and so it will not be possible to switch back to a non
+high-speed mode and so the SD card initialisation will fail.
+
+The SDHCI core does not require that the host have an external regulator
+when switching to UHS modes and therefore, the Tegra SDHCI host
+controller should only advertise the UHS modes as being supported if the
+regulator for the IO voltage is present. Fortunately, Tegra has a vendor
+specific register which can be used to control which modes are
+advertised via the SDHCI_CAPABILITIES register. Hence, if there is no IO
+voltage regulator available for the Tegra SDHCI host, then don't
+advertise the UHS modes.
+
+Note that if the regulator is not available, we also don't advertise that
+the SDHCI is compatible with v3.0 of the SDHCI specification because
+this will read the SDHCI_CAPABILITIES_1 register which will enable other
+UHS modes.
+
+This fixes commit 7ad2ed1dfcbe ("mmc: tegra: enable UHS-I modes") which
+enables UHS mode without checking if the board can support them.
+
+Fixes: 7ad2ed1dfcbe ("mmc: tegra: enable UHS-I modes")
+Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
+Acked-by: Adrian Hunter <adrian.hunter@intel.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci-tegra.c | 49 ++++++++++++++++++++++++-----------------
+ 1 file changed, 29 insertions(+), 20 deletions(-)
+
+--- a/drivers/mmc/host/sdhci-tegra.c
++++ b/drivers/mmc/host/sdhci-tegra.c
+@@ -148,28 +148,37 @@ static void tegra_sdhci_reset(struct sdh
+ return;
+
+ misc_ctrl = sdhci_readl(host, SDHCI_TEGRA_VENDOR_MISC_CTRL);
+- /* Erratum: Enable SDHCI spec v3.00 support */
+- if (soc_data->nvquirks & NVQUIRK_ENABLE_SDHCI_SPEC_300)
+- misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300;
+- /* Advertise UHS modes as supported by host */
+- if (soc_data->nvquirks & NVQUIRK_ENABLE_SDR50)
+- misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_SDR50;
+- else
+- misc_ctrl &= ~SDHCI_MISC_CTRL_ENABLE_SDR50;
+- if (soc_data->nvquirks & NVQUIRK_ENABLE_DDR50)
+- misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_DDR50;
+- else
+- misc_ctrl &= ~SDHCI_MISC_CTRL_ENABLE_DDR50;
+- if (soc_data->nvquirks & NVQUIRK_ENABLE_SDR104)
+- misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_SDR104;
+- else
+- misc_ctrl &= ~SDHCI_MISC_CTRL_ENABLE_SDR104;
+- sdhci_writel(host, misc_ctrl, SDHCI_TEGRA_VENDOR_MISC_CTRL);
+-
+ clk_ctrl = sdhci_readl(host, SDHCI_TEGRA_VENDOR_CLOCK_CTRL);
++
++ misc_ctrl &= ~(SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300 |
++ SDHCI_MISC_CTRL_ENABLE_SDR50 |
++ SDHCI_MISC_CTRL_ENABLE_DDR50 |
++ SDHCI_MISC_CTRL_ENABLE_SDR104);
++
+ clk_ctrl &= ~SDHCI_CLOCK_CTRL_SPI_MODE_CLKEN_OVERRIDE;
+- if (soc_data->nvquirks & SDHCI_MISC_CTRL_ENABLE_SDR50)
+- clk_ctrl |= SDHCI_CLOCK_CTRL_SDR50_TUNING_OVERRIDE;
++
++ /*
++ * If the board does not define a regulator for the SDHCI
++ * IO voltage, then don't advertise support for UHS modes
++ * even if the device supports it because the IO voltage
++ * cannot be configured.
++ */
++ if (!IS_ERR(host->mmc->supply.vqmmc)) {
++ /* Erratum: Enable SDHCI spec v3.00 support */
++ if (soc_data->nvquirks & NVQUIRK_ENABLE_SDHCI_SPEC_300)
++ misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300;
++ /* Advertise UHS modes as supported by host */
++ if (soc_data->nvquirks & NVQUIRK_ENABLE_SDR50)
++ misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_SDR50;
++ if (soc_data->nvquirks & NVQUIRK_ENABLE_DDR50)
++ misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_DDR50;
++ if (soc_data->nvquirks & NVQUIRK_ENABLE_SDR104)
++ misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_SDR104;
++ if (soc_data->nvquirks & SDHCI_MISC_CTRL_ENABLE_SDR50)
++ clk_ctrl |= SDHCI_CLOCK_CTRL_SDR50_TUNING_OVERRIDE;
++ }
++
++ sdhci_writel(host, misc_ctrl, SDHCI_TEGRA_VENDOR_MISC_CTRL);
+ sdhci_writel(host, clk_ctrl, SDHCI_TEGRA_VENDOR_CLOCK_CTRL);
+
+ if (soc_data->nvquirks & NVQUIRK_HAS_PADCALIB)
--- /dev/null
+From a6c50912508d80164a5e607993b617be85a46d73 Mon Sep 17 00:00:00 2001
+From: Guenter Roeck <linux@roeck-us.net>
+Date: Thu, 2 Jun 2016 12:05:12 +0100
+Subject: nvmem: Declare nvmem_cell_read() consistently
+
+From: Guenter Roeck <linux@roeck-us.net>
+
+commit a6c50912508d80164a5e607993b617be85a46d73 upstream.
+
+nvmem_cell_read() is declared as void * if CONFIG_NVMEM is enabled, and
+as char * otherwise. This can result in a build warning if CONFIG_NVMEM
+is not enabled and a caller asigns the result to a type other than char *
+without using a typecast. Use a consistent declaration to avoid the
+problem.
+
+Fixes: e2a5402ec7c6 ("nvmem: Add nvmem_device based consumer apis.")
+Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Signed-off-by: Guenter Roeck <linux@roeck-us.net>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ include/linux/nvmem-consumer.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/include/linux/nvmem-consumer.h
++++ b/include/linux/nvmem-consumer.h
+@@ -74,7 +74,7 @@ static inline void nvmem_cell_put(struct
+ {
+ }
+
+-static inline char *nvmem_cell_read(struct nvmem_cell *cell, size_t *len)
++static inline void *nvmem_cell_read(struct nvmem_cell *cell, size_t *len)
+ {
+ return ERR_PTR(-ENOSYS);
+ }
--- /dev/null
+From 3d89e5478bf550a50c99e93adf659369798263b0 Mon Sep 17 00:00:00 2001
+From: Wanpeng Li <wanpeng.li@hotmail.com>
+Date: Mon, 13 Jun 2016 18:32:45 +0800
+Subject: sched/cputime: Fix prev steal time accouting during CPU hotplug
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Wanpeng Li <wanpeng.li@hotmail.com>
+
+commit 3d89e5478bf550a50c99e93adf659369798263b0 upstream.
+
+Commit:
+
+ e9532e69b8d1 ("sched/cputime: Fix steal time accounting vs. CPU hotplug")
+
+... set rq->prev_* to 0 after a CPU hotplug comes back, in order to
+fix the case where (after CPU hotplug) steal time is smaller than
+rq->prev_steal_time.
+
+However, this should never happen. Steal time was only smaller because of the
+KVM-specific bug fixed by the previous patch. Worse, the previous patch
+triggers a bug on CPU hot-unplug/plug operation: because
+rq->prev_steal_time is cleared, all of the CPU's past steal time will be
+accounted again on hot-plug.
+
+Since the root cause has been fixed, we can just revert commit e9532e69b8d1.
+
+Signed-off-by: Wanpeng Li <wanpeng.li@hotmail.com>
+Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
+Acked-by: Paolo Bonzini <pbonzini@redhat.com>
+Cc: Frederic Weisbecker <fweisbec@gmail.com>
+Cc: Linus Torvalds <torvalds@linux-foundation.org>
+Cc: Mike Galbraith <efault@gmx.de>
+Cc: Peter Zijlstra <peterz@infradead.org>
+Cc: Radim Krčmář <rkrcmar@redhat.com>
+Cc: Rik van Riel <riel@redhat.com>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Fixes: 'commit e9532e69b8d1 ("sched/cputime: Fix steal time accounting vs. CPU hotplug")'
+Link: http://lkml.kernel.org/r/1465813966-3116-3-git-send-email-wanpeng.li@hotmail.com
+Signed-off-by: Ingo Molnar <mingo@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ kernel/sched/core.c | 1 -
+ kernel/sched/sched.h | 13 -------------
+ 2 files changed, 14 deletions(-)
+
+--- a/kernel/sched/core.c
++++ b/kernel/sched/core.c
+@@ -7255,7 +7255,6 @@ static void sched_rq_cpu_starting(unsign
+ struct rq *rq = cpu_rq(cpu);
+
+ rq->calc_load_update = calc_load_update;
+- account_reset_rq(rq);
+ update_max_interval();
+ }
+
+--- a/kernel/sched/sched.h
++++ b/kernel/sched/sched.h
+@@ -1809,16 +1809,3 @@ static inline void cpufreq_trigger_updat
+ #else /* arch_scale_freq_capacity */
+ #define arch_scale_freq_invariant() (false)
+ #endif
+-
+-static inline void account_reset_rq(struct rq *rq)
+-{
+-#ifdef CONFIG_IRQ_TIME_ACCOUNTING
+- rq->prev_irq_time = 0;
+-#endif
+-#ifdef CONFIG_PARAVIRT
+- rq->prev_steal_time = 0;
+-#endif
+-#ifdef CONFIG_PARAVIRT_TIME_ACCOUNTING
+- rq->prev_steal_time_rq = 0;
+-#endif
+-}
rcuperf-don-t-treat-gp_exp-mis-setting-as-a-warn.patch
drivers-perf-arm_pmu-fix-leak-in-error-path.patch
perf-core-use-this_cpu_ptr-when-stopping-aux-events.patch
+mmc-tegra-only-advertise-uhs-modes-if-io-regulator-is-present.patch
+nvmem-declare-nvmem_cell_read-consistently.patch
+hwmon-adt7411-set-bit-3-in-cfg1-register.patch
+sched-cputime-fix-prev-steal-time-accouting-during-cpu-hotplug.patch
+spi-sh-msiof-avoid-invalid-clock-generator-parameters.patch
--- /dev/null
+From c3ccf357c3d75bd2924e049b6a991f7c0c111068 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 5 Aug 2016 10:17:52 +0200
+Subject: spi: sh-msiof: Avoid invalid clock generator parameters
+
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+
+commit c3ccf357c3d75bd2924e049b6a991f7c0c111068 upstream.
+
+The conversion from a look-up table to a calculation for clock generator
+parameters forgot to take into account that BRDV x 1/1 is valid only if
+BRPS is x 1/1 or x 1/2, leading to undefined behavior (e.g. arbitrary
+clock rates).
+
+This limitation is documented for the MSIOF module in all supported
+SH/R-Mobile and R-Car Gen2/Gen3 ARM SoCs.
+
+Tested on r8a7791/koelsch and r8a7795/salvator-x.
+
+Fixes: 65d5665bb260b034 ("spi: sh-msiof: Update calculation of frequency dividing")
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/spi/spi-sh-msiof.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/spi/spi-sh-msiof.c
++++ b/drivers/spi/spi-sh-msiof.c
+@@ -263,6 +263,9 @@ static void sh_msiof_spi_set_clk_regs(st
+
+ for (k = 0; k < ARRAY_SIZE(sh_msiof_spi_div_table); k++) {
+ brps = DIV_ROUND_UP(div, sh_msiof_spi_div_table[k].div);
++ /* SCR_BRDV_DIV_1 is valid only if BRPS is x 1/1 or x 1/2 */
++ if (sh_msiof_spi_div_table[k].div == 1 && brps > 2)
++ continue;
+ if (brps <= 32) /* max of brdv is 32 */
+ break;
+ }