]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
net: dsa: b53: move ARL entry functions into ops struct
authorJonas Gorski <jonas.gorski@gmail.com>
Fri, 7 Nov 2025 08:07:47 +0000 (09:07 +0100)
committerJakub Kicinski <kuba@kernel.org>
Tue, 11 Nov 2025 01:11:07 +0000 (17:11 -0800)
Now that the differences in ARL entry formats are neatly contained into
functions per chip family, wrap them into an ops struct and add wrapper
functions to access them.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://patch.msgid.link/20251107080749.26936-7-jonas.gorski@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/dsa/b53/b53_common.c
drivers/net/dsa/b53/b53_priv.h

index fa4cf6ceddb8c445e05edebacddbc8855cf6099d..c69022cc85bf355867889b1f1a13417a768e0440 100644 (file)
@@ -1910,10 +1910,7 @@ static int b53_arl_read(struct b53_device *dev, const u8 *mac,
 
        /* Read the bins */
        for (i = 0; i < dev->num_arl_bins; i++) {
-               if (is5325(dev) || is5365(dev))
-                       b53_arl_read_entry_25(dev, ent, i);
-               else
-                       b53_arl_read_entry_95(dev, ent, i);
+               b53_arl_read_entry(dev, ent, i);
 
                if (!ent->is_valid) {
                        set_bit(i, free_bins);
@@ -1995,10 +1992,7 @@ static int b53_arl_op(struct b53_device *dev, int op, int port,
        ent.is_static = true;
        ent.is_age = false;
        memcpy(ent.mac, addr, ETH_ALEN);
-       if (is5325(dev) || is5365(dev))
-               b53_arl_write_entry_25(dev, &ent, idx);
-       else
-               b53_arl_write_entry_95(dev, &ent, idx);
+       b53_arl_write_entry(dev, &ent, idx);
 
        return b53_arl_rw_op(dev, 0);
 }
@@ -2109,17 +2103,6 @@ static void b53_arl_search_read_95(struct b53_device *dev, u8 idx,
        b53_arl_to_entry(ent, mac_vid, fwd_entry);
 }
 
-static void b53_arl_search_rd(struct b53_device *dev, u8 idx,
-                             struct b53_arl_entry *ent)
-{
-       if (is5325(dev))
-               b53_arl_search_read_25(dev, idx, ent);
-       else if (is5365(dev))
-               b53_arl_search_read_65(dev, idx, ent);
-       else
-               b53_arl_search_read_95(dev, idx, ent);
-}
-
 static int b53_fdb_copy(int port, const struct b53_arl_entry *ent,
                        dsa_fdb_dump_cb_t *cb, void *data)
 {
@@ -2153,13 +2136,13 @@ int b53_fdb_dump(struct dsa_switch *ds, int port,
                if (ret)
                        break;
 
-               b53_arl_search_rd(priv, 0, &results[0]);
+               b53_arl_search_read(priv, 0, &results[0]);
                ret = b53_fdb_copy(port, &results[0], cb, data);
                if (ret)
                        break;
 
                if (results_per_hit == 2) {
-                       b53_arl_search_rd(priv, 1, &results[1]);
+                       b53_arl_search_read(priv, 1, &results[1]);
                        ret = b53_fdb_copy(port, &results[1], cb, data);
                        if (ret)
                                break;
@@ -2688,6 +2671,24 @@ static const struct dsa_switch_ops b53_switch_ops = {
        .port_change_mtu        = b53_change_mtu,
 };
 
+static const struct b53_arl_ops b53_arl_ops_25 = {
+       .arl_read_entry = b53_arl_read_entry_25,
+       .arl_write_entry = b53_arl_write_entry_25,
+       .arl_search_read = b53_arl_search_read_25,
+};
+
+static const struct b53_arl_ops b53_arl_ops_65 = {
+       .arl_read_entry = b53_arl_read_entry_25,
+       .arl_write_entry = b53_arl_write_entry_25,
+       .arl_search_read = b53_arl_search_read_65,
+};
+
+static const struct b53_arl_ops b53_arl_ops_95 = {
+       .arl_read_entry = b53_arl_read_entry_95,
+       .arl_write_entry = b53_arl_write_entry_95,
+       .arl_search_read = b53_arl_search_read_95,
+};
+
 struct b53_chip_data {
        u32 chip_id;
        const char *dev_name;
@@ -2701,6 +2702,7 @@ struct b53_chip_data {
        u8 duplex_reg;
        u8 jumbo_pm_reg;
        u8 jumbo_size_reg;
+       const struct b53_arl_ops *arl_ops;
 };
 
 #define B53_VTA_REGS   \
@@ -2720,6 +2722,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .arl_buckets = 1024,
                .imp_port = 5,
                .duplex_reg = B53_DUPLEX_STAT_FE,
+               .arl_ops = &b53_arl_ops_25,
        },
        {
                .chip_id = BCM5365_DEVICE_ID,
@@ -2730,6 +2733,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .arl_buckets = 1024,
                .imp_port = 5,
                .duplex_reg = B53_DUPLEX_STAT_FE,
+               .arl_ops = &b53_arl_ops_65,
        },
        {
                .chip_id = BCM5389_DEVICE_ID,
@@ -2743,6 +2747,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM5395_DEVICE_ID,
@@ -2756,6 +2761,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM5397_DEVICE_ID,
@@ -2769,6 +2775,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM5398_DEVICE_ID,
@@ -2782,6 +2789,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM53101_DEVICE_ID,
@@ -2795,6 +2803,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM53115_DEVICE_ID,
@@ -2808,6 +2817,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM53125_DEVICE_ID,
@@ -2821,6 +2831,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM53128_DEVICE_ID,
@@ -2834,6 +2845,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM63XX_DEVICE_ID,
@@ -2847,6 +2859,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_63XX,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK_63XX,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE_63XX,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM53010_DEVICE_ID,
@@ -2860,6 +2873,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM53011_DEVICE_ID,
@@ -2873,6 +2887,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM53012_DEVICE_ID,
@@ -2886,6 +2901,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM53018_DEVICE_ID,
@@ -2899,6 +2915,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM53019_DEVICE_ID,
@@ -2912,6 +2929,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM58XX_DEVICE_ID,
@@ -2925,6 +2943,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM583XX_DEVICE_ID,
@@ -2938,6 +2957,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        /* Starfighter 2 */
        {
@@ -2952,6 +2972,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM7445_DEVICE_ID,
@@ -2965,6 +2986,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM7278_DEVICE_ID,
@@ -2978,6 +3000,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
        {
                .chip_id = BCM53134_DEVICE_ID,
@@ -2992,6 +3015,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
                .duplex_reg = B53_DUPLEX_STAT_GE,
                .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
                .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+               .arl_ops = &b53_arl_ops_95,
        },
 };
 
@@ -3020,6 +3044,7 @@ static int b53_switch_init(struct b53_device *dev)
                        dev->num_vlans = chip->vlans;
                        dev->num_arl_bins = chip->arl_bins;
                        dev->num_arl_buckets = chip->arl_buckets;
+                       dev->arl_ops = chip->arl_ops;
                        break;
                }
        }
index 458775f9516437f242a7936d7b85094cb634321f..ef2413509b5db50178bb439256a41dcf4821e62f 100644 (file)
@@ -58,6 +58,17 @@ struct b53_io_ops {
                                bool link_up);
 };
 
+struct b53_arl_entry;
+
+struct b53_arl_ops {
+       void (*arl_read_entry)(struct b53_device *dev,
+                              struct b53_arl_entry *ent, u8 idx);
+       void (*arl_write_entry)(struct b53_device *dev,
+                               const struct b53_arl_entry *ent, u8 idx);
+       void (*arl_search_read)(struct b53_device *dev, u8 idx,
+                               struct b53_arl_entry *ent);
+};
+
 #define B53_INVALID_LANE       0xff
 
 enum {
@@ -127,6 +138,7 @@ struct b53_device {
        struct mutex stats_mutex;
        struct mutex arl_mutex;
        const struct b53_io_ops *ops;
+       const struct b53_arl_ops *arl_ops;
 
        /* chip specific data */
        u32 chip_id;
@@ -371,6 +383,24 @@ static inline void b53_arl_from_entry_25(u64 *mac_vid,
                *mac_vid |= ARLTBL_AGE_25;
 }
 
+static inline void b53_arl_read_entry(struct b53_device *dev,
+                                     struct b53_arl_entry *ent, u8 idx)
+{
+       dev->arl_ops->arl_read_entry(dev, ent, idx);
+}
+
+static inline void b53_arl_write_entry(struct b53_device *dev,
+                                      const struct b53_arl_entry *ent, u8 idx)
+{
+       dev->arl_ops->arl_write_entry(dev, ent, idx);
+}
+
+static inline void b53_arl_search_read(struct b53_device *dev, u8 idx,
+                                      struct b53_arl_entry *ent)
+{
+       dev->arl_ops->arl_search_read(dev, idx, ent);
+}
+
 #ifdef CONFIG_BCM47XX
 
 #include <linux/bcm47xx_nvram.h>