]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
spi: spi-microchip-core: Fix the number of chip selects supported
authorPrajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
Tue, 14 May 2024 10:45:07 +0000 (11:45 +0100)
committerMark Brown <broonie@kernel.org>
Mon, 27 May 2024 00:33:15 +0000 (01:33 +0100)
The SPI "hard" controller in PolarFire SoC has eight CS lines, but only
one CS line is wired. When the 'num-cs' property is not specified in
the device tree, the driver defaults to the MAX_CS value, which has
been fixed to 1 to match the hardware configuration; however, when the
'num-cs' property is explicitly defined in the device tree, it
overrides the default value.

Fixes: 9ac8d17694b6 ("spi: add support for microchip fpga spi controllers")
Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://msgid.link/r/20240514104508.938448-3-prajna.rajendrakumar@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-microchip-core.c

index 634364c7cfe6127f2970760b0c6c9cf20fe62269..c10de45aa4729eb1beb48f317ba7f27517056880 100644 (file)
@@ -21,7 +21,7 @@
 #include <linux/spi/spi.h>
 
 #define MAX_LEN                                (0xffff)
-#define MAX_CS                         (8)
+#define MAX_CS                         (1)
 #define DEFAULT_FRAMESIZE              (8)
 #define FIFO_DEPTH                     (32)
 #define CLK_GEN_MODE1_MAX              (255)