.has_36bit_dma = true,
};
+static const struct mxc_isi_plat_data mxc_imx8qm_data = {
+ .model = MXC_ISI_IMX8QM,
+ .num_ports = 5,
+ .num_channels = 8,
+ .reg_offset = 0x10000,
+ .ier_reg = &mxc_imx8_isi_ier_qm,
+ .set_thd = &mxc_imx8_isi_thd_v1,
+ .buf_active_reverse = true,
+ .has_36bit_dma = false,
+};
+
+static const struct mxc_isi_plat_data mxc_imx8qxp_data = {
+ .model = MXC_ISI_IMX8QXP,
+ .num_ports = 5,
+ .num_channels = 6,
+ .reg_offset = 0x10000,
+ .ier_reg = &mxc_imx8_isi_ier_v2,
+ .set_thd = &mxc_imx8_isi_thd_v1,
+ .buf_active_reverse = true,
+ .has_36bit_dma = false,
+};
+
static const struct mxc_isi_plat_data mxc_imx8ulp_data = {
.model = MXC_ISI_IMX8ULP,
.num_ports = 1,
.has_36bit_dma = false,
};
-static const struct mxc_isi_plat_data mxc_imx8qm_data = {
- .model = MXC_ISI_IMX8QM,
- .num_ports = 5,
- .num_channels = 8,
- .reg_offset = 0x10000,
- .ier_reg = &mxc_imx8_isi_ier_qm,
- .set_thd = &mxc_imx8_isi_thd_v1,
- .buf_active_reverse = true,
- .has_36bit_dma = false,
-};
-
-static const struct mxc_isi_plat_data mxc_imx8qxp_data = {
- .model = MXC_ISI_IMX8QXP,
- .num_ports = 5,
- .num_channels = 6,
- .reg_offset = 0x10000,
- .ier_reg = &mxc_imx8_isi_ier_v2,
- .set_thd = &mxc_imx8_isi_thd_v1,
- .buf_active_reverse = true,
- .has_36bit_dma = false,
-};
-
/* -----------------------------------------------------------------------------
* Power management
*/