drm/xe: Compute dumb-buffer sizes with drm_mode_size_dumb()

Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch
and buffer size. Align the pitch to a multiple of 8. Align the
buffer size according to hardware requirements.

Xe's internal calculation allowed for 64-bit wide buffer sizes, but
the ioctl's internal checks always verified against 32-bit wide limits.
Hance, it is safe to limit the driver code to 32-bit calculations as
well.

v3:
- mention 32-bit calculation in commit description (Matthew)

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Acked-by: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/20250821081918.79786-24-tzimmermann@suse.de

diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index ebcd191034df2995a97caa2f0585bb32c1770744..81bae7a5903861165daa206e64d4aaca9bcb8d37 100644 (file)
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -9,6 +9,7 @@
 #include <linux/nospec.h>
 
 #include <drm/drm_drv.h>
+#include <drm/drm_dumb_buffers.h>
 #include <drm/drm_gem_ttm_helper.h>
 #include <drm/drm_managed.h>
 #include <drm/ttm/ttm_backup.h>
@@ -3160,14 +3161,13 @@ int xe_bo_dumb_create(struct drm_file *file_priv,
        struct xe_device *xe = to_xe_device(dev);
        struct xe_bo *bo;
        uint32_t handle;
-       int cpp = DIV_ROUND_UP(args->bpp, 8);
        int err;
        u32 page_size = max_t(u32, PAGE_SIZE,
                xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K);
 
-       args->pitch = ALIGN(args->width * cpp, 64);
-       args->size = ALIGN(mul_u32_u32(args->pitch, args->height),
-                          page_size);
+       err = drm_mode_size_dumb(dev, args, SZ_64, page_size);
+       if (err)
+               return err;
 
        bo = xe_bo_create_user(xe, NULL, NULL, args->size,
                               DRM_XE_GEM_CPU_CACHING_WC,