--- /dev/null
+From 4a35f83b2b7c6aae3fc0d1c4554fdc99dc33ad07 Mon Sep 17 00:00:00 2001
+From: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Date: Fri, 22 Feb 2013 16:53:38 +0200
+Subject: drm/i915: Don't clobber crtc->fb when queue_flip fails
+
+From: Ville Syrjälä <ville.syrjala@linux.intel.com>
+
+commit 4a35f83b2b7c6aae3fc0d1c4554fdc99dc33ad07 upstream.
+
+Restore crtc->fb to the old framebuffer if queue_flip fails.
+
+While at it, kill the pointless intel_fb temp variable.
+
+v2: Update crtc->fb before queue_flip and restore it back
+ after a failure.
+
+Backported for 3.8-stable. Restored an atomic_sub removed
+in 3.9 ca9c46.
+
+Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
+Reported-and-Tested-by: Mika Kuoppala <mika.kuoppala@intel.com>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Lingzhu Xiang <lxiang@redhat.com>
+Reviewed-by: CAI Qian <caiqian@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_display.c | 11 ++++-------
+ 1 file changed, 4 insertions(+), 7 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -7420,8 +7420,8 @@ static int intel_crtc_page_flip(struct d
+ {
+ struct drm_device *dev = crtc->dev;
+ struct drm_i915_private *dev_priv = dev->dev_private;
+- struct intel_framebuffer *intel_fb;
+- struct drm_i915_gem_object *obj;
++ struct drm_framebuffer *old_fb = crtc->fb;
++ struct drm_i915_gem_object *obj = to_intel_framebuffer(fb)->obj;
+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ struct intel_unpin_work *work;
+ unsigned long flags;
+@@ -7446,8 +7446,7 @@ static int intel_crtc_page_flip(struct d
+
+ work->event = event;
+ work->crtc = crtc;
+- intel_fb = to_intel_framebuffer(crtc->fb);
+- work->old_fb_obj = intel_fb->obj;
++ work->old_fb_obj = to_intel_framebuffer(old_fb)->obj;
+ INIT_WORK(&work->work, intel_unpin_work_fn);
+
+ ret = drm_vblank_get(dev, intel_crtc->pipe);
+@@ -7467,9 +7466,6 @@ static int intel_crtc_page_flip(struct d
+ intel_crtc->unpin_work = work;
+ spin_unlock_irqrestore(&dev->event_lock, flags);
+
+- intel_fb = to_intel_framebuffer(fb);
+- obj = intel_fb->obj;
+-
+ if (atomic_read(&intel_crtc->unpin_work_count) >= 2)
+ flush_workqueue(dev_priv->wq);
+
+@@ -7507,6 +7503,7 @@ static int intel_crtc_page_flip(struct d
+
+ cleanup_pending:
+ atomic_dec(&intel_crtc->unpin_work_count);
++ crtc->fb = old_fb;
+ atomic_sub(1 << intel_crtc->plane, &work->old_fb_obj->pending_flip);
+ drm_gem_object_unreference(&work->old_fb_obj->base);
+ drm_gem_object_unreference(&obj->base);
--- /dev/null
+From 9d1a455b0ca1c2c956b4d9ab212864a8695270f1 Mon Sep 17 00:00:00 2001
+From: Takashi Iwai <tiwai@suse.de>
+Date: Mon, 18 Mar 2013 11:25:36 +0100
+Subject: drm/i915: Use the fixed pixel clock for eDP in intel_dp_set_m_n()
+
+From: Takashi Iwai <tiwai@suse.de>
+
+commit 9d1a455b0ca1c2c956b4d9ab212864a8695270f1 upstream.
+
+The eDP output on HP Z1 is still broken when X is started even after
+fixing the infinite link-train loop. The regression was introduced in
+3.6 kernel for cleaning up the mode clock handling code in intel_dp.c
+by the commit [71244653: drm/i915: adjusted_mode->clock in the dp
+mode_fix].
+
+In the past, the clock of the reference mode was modified in
+intel_dp_mode_fixup() in the case of eDP fixed clock, and this clock was
+used for calculating in intel_dp_set_m_n(). This override was removed,
+thus the wrong mode clock is used for the calculation, resulting in a
+psychedelic smoking output in the end.
+
+This patch corrects the clock to be used in the place.
+
+v1->v2: Use intel_edp_target_clock() for checking eDP fixed clock
+instead of open code as in ironlake_set_m_n().
+
+Backported for 3.8-stable. Reverted refactoring in e69d0bc1.
+
+Signed-off-by: Takashi Iwai <tiwai@suse.de>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Lingzhu Xiang <lxiang@redhat.com>
+Reviewed-by: CAI Qian <caiqian@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_dp.c | 12 +++++++++++-
+ 1 file changed, 11 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/i915/intel_dp.c
++++ b/drivers/gpu/drm/i915/intel_dp.c
+@@ -788,6 +788,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc,
+ struct intel_dp_m_n m_n;
+ int pipe = intel_crtc->pipe;
+ enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder;
++ int target_clock;
+
+ /*
+ * Find the lane count in the intel_encoder private
+@@ -803,13 +804,22 @@ intel_dp_set_m_n(struct drm_crtc *crtc,
+ }
+ }
+
++ target_clock = mode->clock;
++ for_each_encoder_on_crtc(dev, crtc, intel_encoder) {
++ if (intel_encoder->type == INTEL_OUTPUT_EDP) {
++ target_clock = intel_edp_target_clock(intel_encoder,
++ mode);
++ break;
++ }
++ }
++
+ /*
+ * Compute the GMCH and Link ratios. The '3' here is
+ * the number of bytes_per_pixel post-LUT, which we always
+ * set up for 8-bits of R/G/B, or 3 bytes total.
+ */
+ intel_dp_compute_m_n(intel_crtc->bpp, lane_count,
+- mode->clock, adjusted_mode->clock, &m_n);
++ target_clock, adjusted_mode->clock, &m_n);
+
+ if (IS_HASWELL(dev)) {
+ I915_WRITE(PIPE_DATA_M1(cpu_transcoder),
virtio-console-rename-cvq_lock-to-c_ivq_lock.patch
virtio-console-add-locking-around-c_ovq-operations.patch
nfsd4-reject-negative-acl-lengths.patch
+drm-i915-use-the-fixed-pixel-clock-for-edp-in-intel_dp_set_m_n.patch
+drm-i915-don-t-clobber-crtc-fb-when-queue_flip-fails.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
