--- /dev/null
+From 06cb616b1bca7080824acfedb3d4c898e7a64836 Mon Sep 17 00:00:00 2001
+From: Alexander Monakov <amonakov@ispras.ru>
+Date: Sat, 28 Apr 2018 16:56:06 +0300
+Subject: i2c: designware: fix poll-after-enable regression
+
+From: Alexander Monakov <amonakov@ispras.ru>
+
+commit 06cb616b1bca7080824acfedb3d4c898e7a64836 upstream.
+
+Not all revisions of DW I2C controller implement the enable status register.
+On platforms where that's the case (e.g. BG2CD and SPEAr ARM SoCs), waiting
+for enable will time out as reading the unimplemented register yields zero.
+
+It was observed that reading the IC_ENABLE_STATUS register once suffices to
+avoid getting it stuck on Bay Trail hardware, so replace polling with one
+dummy read of the register.
+
+Fixes: fba4adbbf670 ("i2c: designware: must wait for enable")
+Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
+Tested-by: Ben Gardner <gardner.ben@gmail.com>
+Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+Cc: stable@kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/i2c/busses/i2c-designware-core.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/drivers/i2c/busses/i2c-designware-core.c
++++ b/drivers/i2c/busses/i2c-designware-core.c
+@@ -507,7 +507,10 @@ static void i2c_dw_xfer_init(struct dw_i
+ i2c_dw_disable_int(dev);
+
+ /* Enable the adapter */
+- __i2c_dw_enable_and_wait(dev, true);
++ __i2c_dw_enable(dev, true);
++
++ /* Dummy read to avoid the register getting stuck on Bay Trail */
++ dw_readl(dev, DW_IC_ENABLE_STATUS);
+
+ /* Clear and enable interrupts */
+ dw_readl(dev, DW_IC_CLR_INTR);
--- /dev/null
+From c1d2a31397ec51f0370f6bd17b19b39152c263cb Mon Sep 17 00:00:00 2001
+From: Nicholas Piggin <npiggin@gmail.com>
+Date: Tue, 15 May 2018 01:59:47 +1000
+Subject: powerpc/powernv: Fix NVRAM sleep in invalid context when crashing
+
+From: Nicholas Piggin <npiggin@gmail.com>
+
+commit c1d2a31397ec51f0370f6bd17b19b39152c263cb upstream.
+
+Similarly to opal_event_shutdown, opal_nvram_write can be called in
+the crash path with irqs disabled. Special case the delay to avoid
+sleeping in invalid context.
+
+Fixes: 3b8070335f75 ("powerpc/powernv: Fix OPAL NVRAM driver OPAL_BUSY loops")
+Cc: stable@vger.kernel.org # v3.2
+Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
+Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/powerpc/platforms/powernv/opal-nvram.c | 14 ++++++++++++--
+ 1 file changed, 12 insertions(+), 2 deletions(-)
+
+--- a/arch/powerpc/platforms/powernv/opal-nvram.c
++++ b/arch/powerpc/platforms/powernv/opal-nvram.c
+@@ -44,6 +44,10 @@ static ssize_t opal_nvram_read(char *buf
+ return count;
+ }
+
++/*
++ * This can be called in the panic path with interrupts off, so use
++ * mdelay in that case.
++ */
+ static ssize_t opal_nvram_write(char *buf, size_t count, loff_t *index)
+ {
+ s64 rc = OPAL_BUSY;
+@@ -58,10 +62,16 @@ static ssize_t opal_nvram_write(char *bu
+ while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
+ rc = opal_write_nvram(__pa(buf), count, off);
+ if (rc == OPAL_BUSY_EVENT) {
+- msleep(OPAL_BUSY_DELAY_MS);
++ if (in_interrupt() || irqs_disabled())
++ mdelay(OPAL_BUSY_DELAY_MS);
++ else
++ msleep(OPAL_BUSY_DELAY_MS);
+ opal_poll_events(NULL);
+ } else if (rc == OPAL_BUSY) {
+- msleep(OPAL_BUSY_DELAY_MS);
++ if (in_interrupt() || irqs_disabled())
++ mdelay(OPAL_BUSY_DELAY_MS);
++ else
++ msleep(OPAL_BUSY_DELAY_MS);
+ }
+ }
+