]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
clk: en7523: map io region in a single block
authorLorenzo Bianconi <lorenzo@kernel.org>
Tue, 12 Nov 2024 00:08:54 +0000 (01:08 +0100)
committerStephen Boyd <sboyd@kernel.org>
Thu, 14 Nov 2024 20:58:56 +0000 (12:58 -0800)
Map all clock-controller memory region in a single block.
This patch does not introduce any backward incompatibility since the dts
for EN7581 SoC is not upstream yet.

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/20241112-clk-en7581-syscon-v2-7-8ada5e394ae4@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/clk-en7523.c

index 60dc938144d75b5fa21c9109ff05ed1083a16678..e52c5460e927f54c6df152c60560f438f89ec928 100644 (file)
@@ -39,8 +39,8 @@
 #define REG_PCIE_XSI1_SEL_MASK         GENMASK(12, 11)
 #define REG_CRYPTO_CLKSRC2             0x20c
 
-#define REG_RST_CTRL2                  0x00
-#define REG_RST_CTRL1                  0x04
+#define REG_RST_CTRL2                  0x830
+#define REG_RST_CTRL1                  0x834
 
 struct en_clk_desc {
        int id;
@@ -645,15 +645,9 @@ static const struct reset_control_ops en7581_reset_ops = {
        .status = en7523_reset_status,
 };
 
-static int en7581_reset_register(struct platform_device *pdev)
+static int en7581_reset_register(struct device *dev, void __iomem *base)
 {
-       struct device *dev = &pdev->dev;
        struct en_rst_data *rst_data;
-       void __iomem *base;
-
-       base = devm_platform_ioremap_resource(pdev, 1);
-       if (IS_ERR(base))
-               return PTR_ERR(base);
 
        rst_data = devm_kzalloc(dev, sizeof(*rst_data), GFP_KERNEL);
        if (!rst_data)
@@ -677,27 +671,27 @@ static int en7581_reset_register(struct platform_device *pdev)
 static int en7581_clk_hw_init(struct platform_device *pdev,
                              struct clk_hw_onecell_data *clk_data)
 {
-       void __iomem *np_base;
        struct regmap *map;
+       void __iomem *base;
        u32 val;
 
        map = syscon_regmap_lookup_by_compatible("airoha,en7581-chip-scu");
        if (IS_ERR(map))
                return PTR_ERR(map);
 
-       np_base = devm_platform_ioremap_resource(pdev, 0);
-       if (IS_ERR(np_base))
-               return PTR_ERR(np_base);
+       base = devm_platform_ioremap_resource(pdev, 0);
+       if (IS_ERR(base))
+               return PTR_ERR(base);
 
-       en7581_register_clocks(&pdev->dev, clk_data, map, np_base);
+       en7581_register_clocks(&pdev->dev, clk_data, map, base);
 
-       val = readl(np_base + REG_NP_SCU_SSTR);
+       val = readl(base + REG_NP_SCU_SSTR);
        val &= ~(REG_PCIE_XSI0_SEL_MASK | REG_PCIE_XSI1_SEL_MASK);
-       writel(val, np_base + REG_NP_SCU_SSTR);
-       val = readl(np_base + REG_NP_SCU_PCIC);
-       writel(val | 3, np_base + REG_NP_SCU_PCIC);
+       writel(val, base + REG_NP_SCU_SSTR);
+       val = readl(base + REG_NP_SCU_PCIC);
+       writel(val | 3, base + REG_NP_SCU_PCIC);
 
-       return en7581_reset_register(pdev);
+       return en7581_reset_register(&pdev->dev, base);
 }
 
 static int en7523_clk_probe(struct platform_device *pdev)