net: stmmac: remove hw->ps xxx_core_init() hardware setup

After a lot of digging, it seems that the oddly named hw->ps member is
all about configuring the core for reverse SGMII. This member is set to
one of 0, SPEED_10, SPEED_100 or SPEED_1000 depending on
priv->plat->mac_port_sel_speed. On DT systems, this comes from the
"snps,ps-speed" DT property.

When set to a non-zero value, it:

1. Configures the MAC at initialisation time to operate at a specific
   speed. However, this will be overwritten by mac_link_up() when the
   link comes up (e.g. with the fixed-link parameters.)

   Note that dwxgmac2 wants to also support SPEED_2500 and SPEED_10000,
   but both these values are impossible.

2. It _incorrectly_ enables the transmitter (GMAC_CONFIG_TE) which
   makes no sense, rather than enabling the "transmit configuration"
   bit (GMAC_CONFIG_TC). Likely a typo.

3. It configures the SGMII rate adapter layer to retrieve its speed
   setting from the MAC configuration register rather than the PHY.

There are two ways forward here:

a) fixing (2) so that we set GMAC_CONFIG_TC. However, we have platform
   that set the "snps,ps-speed" property and that work today. Fixing
   this will cause the RGMII, SGMII or SMII inband configuration to be
   transmitted, which will be a functional change which could cause a
   regression.

b) ripping out (1) and (2) as they are ineffective. This also has the
   possibility of regressions, but the patch author believes this risk
   is much lower than (a).

Therefore, this commit takes the approach in (b).

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Tested-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://patch.msgid.link/E1v9P6N-0000000Aolg-3y0a@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index 5c653be3d453ff37045d3fb22575a8b1a2fb4e57..d35db8958be15a3f469a8fd8f1d2a4b659f22d7c 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -26,35 +26,18 @@ static void dwmac1000_core_init(struct mac_device_info *hw,
                                struct net_device *dev)
 {
        void __iomem *ioaddr = hw->pcsr;
-       u32 value = readl(ioaddr + GMAC_CONTROL);
        int mtu = dev->mtu;
+       u32 value;
 
        /* Configure GMAC core */
-       value |= GMAC_CORE_INIT;
+       value = readl(ioaddr + GMAC_CONTROL);
 
        if (mtu > 1500)
                value |= GMAC_CONTROL_2K;
        if (mtu > 2000)
                value |= GMAC_CONTROL_JE;
 
-       if (hw->ps) {
-               value |= GMAC_CONTROL_TE;
-
-               value &= ~hw->link.speed_mask;
-               switch (hw->ps) {
-               case SPEED_1000:
-                       value |= hw->link.speed1000;
-                       break;
-               case SPEED_100:
-                       value |= hw->link.speed100;
-                       break;
-               case SPEED_10:
-                       value |= hw->link.speed10;
-                       break;
-               }
-       }
-
-       writel(value, ioaddr + GMAC_CONTROL);
+       writel(value | GMAC_CORE_INIT, ioaddr + GMAC_CONTROL);
 
        /* Mask GMAC interrupts */
        value = GMAC_INT_DEFAULT_MASK;

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index 21e4461db937827571bf6c7ffbe996b9c6d635ed..d855ab6b91458ec7b885cfb035a3f2d3a8975137 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -27,29 +27,11 @@ static void dwmac4_core_init(struct mac_device_info *hw,
 {
        struct stmmac_priv *priv = netdev_priv(dev);
        void __iomem *ioaddr = hw->pcsr;
-       u32 value = readl(ioaddr + GMAC_CONFIG);
        unsigned long clk_rate;
+       u32 value;
 
-       value |= GMAC_CORE_INIT;
-
-       if (hw->ps) {
-               value |= GMAC_CONFIG_TE;
-
-               value &= hw->link.speed_mask;
-               switch (hw->ps) {
-               case SPEED_1000:
-                       value |= hw->link.speed1000;
-                       break;
-               case SPEED_100:
-                       value |= hw->link.speed100;
-                       break;
-               case SPEED_10:
-                       value |= hw->link.speed10;
-                       break;
-               }
-       }
-
-       writel(value, ioaddr + GMAC_CONFIG);
+       value = readl(ioaddr + GMAC_CONFIG);
+       writel(value | GMAC_CORE_INIT, ioaddr + GMAC_CONFIG);
 
        /* Configure LPI 1us counter to number of CSR clock ticks in 1us - 1 */
        clk_rate = clk_get_rate(priv->plat->stmmac_clk);

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
index 00e929bf280baec7aa8d2a75fc5ceea4a52c9979..0430af27da407e94a8513b58133789b6da04ff94 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
@@ -23,29 +23,8 @@ static void dwxgmac2_core_init(struct mac_device_info *hw,
        tx = readl(ioaddr + XGMAC_TX_CONFIG);
        rx = readl(ioaddr + XGMAC_RX_CONFIG);
 
-       tx |= XGMAC_CORE_INIT_TX;
-       rx |= XGMAC_CORE_INIT_RX;
-
-       if (hw->ps) {
-               tx |= XGMAC_CONFIG_TE;
-               tx &= ~hw->link.speed_mask;
-
-               switch (hw->ps) {
-               case SPEED_10000:
-                       tx |= hw->link.xgmii.speed10000;
-                       break;
-               case SPEED_2500:
-                       tx |= hw->link.speed2500;
-                       break;
-               case SPEED_1000:
-               default:
-                       tx |= hw->link.speed1000;
-                       break;
-               }
-       }
-
-       writel(tx, ioaddr + XGMAC_TX_CONFIG);
-       writel(rx, ioaddr + XGMAC_RX_CONFIG);
+       writel(tx | XGMAC_CORE_INIT_TX, ioaddr + XGMAC_TX_CONFIG);
+       writel(rx | XGMAC_CORE_INIT_RX, ioaddr + XGMAC_RX_CONFIG);
        writel(XGMAC_INT_DEFAULT_EN, ioaddr + XGMAC_INT_EN);
 }