+++ /dev/null
-From 45bad9afb01cf09b1301a08c8e036758f4560543 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Mon, 10 Mar 2025 10:47:47 +0800
-Subject: iommu/vt-d: Move scalable mode ATS enablement to probe path
-
-From: Lu Baolu <baolu.lu@linux.intel.com>
-
-[ Upstream commit 5518f239aff1baf772c5748da3add7243c5fb5df ]
-
-Device ATS is currently enabled when a domain is attached to the device
-and disabled when the domain is detached. This creates a limitation:
-when the IOMMU is operating in scalable mode and IOPF is enabled, the
-device's domain cannot be changed.
-
-The previous code enables ATS when a domain is set to a device's RID and
-disables it during RID domain switch. So, if a PASID is set with a
-domain requiring PRI, ATS should remain enabled until the domain is
-removed. During the PASID domain's lifecycle, if the RID's domain
-changes, PRI will be disrupted because it depends on ATS, which is
-disabled when the blocking domain is set for the device's RID.
-
-Remove this limitation by moving ATS enablement to the device probe path.
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Reviewed-by: Kevin Tian <kevin.tian@intel.com>
-Tested-by: Zhangfei Gao <zhangfei.gao@linaro.org>
-Link: https://lore.kernel.org/r/20250228092631.3425464-5-baolu.lu@linux.intel.com
-Signed-off-by: Joerg Roedel <jroedel@suse.de>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- drivers/iommu/intel/iommu.c | 51 ++++++++++++++++++++-----------------
- 1 file changed, 27 insertions(+), 24 deletions(-)
-
-diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
-index 157542c07aaaf..737f33cddc43f 100644
---- a/drivers/iommu/intel/iommu.c
-+++ b/drivers/iommu/intel/iommu.c
-@@ -1284,32 +1284,28 @@ static bool dev_needs_extra_dtlb_flush(struct pci_dev *pdev)
- return true;
- }
-
--static void iommu_enable_pci_caps(struct device_domain_info *info)
-+static void iommu_enable_pci_ats(struct device_domain_info *info)
- {
- struct pci_dev *pdev;
-
-- if (!dev_is_pci(info->dev))
-+ if (!info->ats_supported)
- return;
-
- pdev = to_pci_dev(info->dev);
-- if (info->ats_supported && pci_ats_page_aligned(pdev) &&
-- !pci_enable_ats(pdev, VTD_PAGE_SHIFT))
-+ if (!pci_ats_page_aligned(pdev))
-+ return;
-+
-+ if (!pci_enable_ats(pdev, VTD_PAGE_SHIFT))
- info->ats_enabled = 1;
- }
-
--static void iommu_disable_pci_caps(struct device_domain_info *info)
-+static void iommu_disable_pci_ats(struct device_domain_info *info)
- {
-- struct pci_dev *pdev;
--
-- if (!dev_is_pci(info->dev))
-+ if (!info->ats_enabled)
- return;
-
-- pdev = to_pci_dev(info->dev);
--
-- if (info->ats_enabled) {
-- pci_disable_ats(pdev);
-- info->ats_enabled = 0;
-- }
-+ pci_disable_ats(to_pci_dev(info->dev));
-+ info->ats_enabled = 0;
- }
-
- static void intel_flush_iotlb_all(struct iommu_domain *domain)
-@@ -1722,12 +1718,19 @@ domain_context_mapping(struct dmar_domain *domain, struct device *dev)
- struct device_domain_info *info = dev_iommu_priv_get(dev);
- struct intel_iommu *iommu = info->iommu;
- u8 bus = info->bus, devfn = info->devfn;
-+ int ret;
-
- if (!dev_is_pci(dev))
- return domain_context_mapping_one(domain, iommu, bus, devfn);
-
-- return pci_for_each_dma_alias(to_pci_dev(dev),
-- domain_context_mapping_cb, domain);
-+ ret = pci_for_each_dma_alias(to_pci_dev(dev),
-+ domain_context_mapping_cb, domain);
-+ if (ret)
-+ return ret;
-+
-+ iommu_enable_pci_ats(info);
-+
-+ return 0;
- }
-
- /* Return largest possible superpage level for a given mapping */
-@@ -1987,8 +1990,6 @@ static int dmar_domain_attach_device(struct dmar_domain *domain,
- if (ret)
- goto out_block_translation;
-
-- iommu_enable_pci_caps(info);
--
- ret = cache_tag_assign_domain(domain, dev, IOMMU_NO_PASID);
- if (ret)
- goto out_block_translation;
-@@ -3368,6 +3369,7 @@ static void domain_context_clear(struct device_domain_info *info)
-
- pci_for_each_dma_alias(to_pci_dev(info->dev),
- &domain_context_clear_one_cb, info);
-+ iommu_disable_pci_ats(info);
- }
-
- /*
-@@ -3384,7 +3386,6 @@ void device_block_translation(struct device *dev)
- if (info->domain)
- cache_tag_unassign_domain(info->domain, dev, IOMMU_NO_PASID);
-
-- iommu_disable_pci_caps(info);
- if (!dev_is_real_dma_subdevice(dev)) {
- if (sm_supported(iommu))
- intel_pasid_tear_down_entry(iommu, dev,
-@@ -3964,6 +3965,9 @@ static struct iommu_device *intel_iommu_probe_device(struct device *dev)
- !pci_enable_pasid(pdev, info->pasid_supported & ~1))
- info->pasid_enabled = 1;
-
-+ if (sm_supported(iommu))
-+ iommu_enable_pci_ats(info);
-+
- return &iommu->iommu;
- free_table:
- intel_pasid_free_table(dev);
-@@ -3980,6 +3984,8 @@ static void intel_iommu_release_device(struct device *dev)
- struct device_domain_info *info = dev_iommu_priv_get(dev);
- struct intel_iommu *iommu = info->iommu;
-
-+ iommu_disable_pci_ats(info);
-+
- if (info->pasid_enabled) {
- pci_disable_pasid(to_pci_dev(dev));
- info->pasid_enabled = 0;
-@@ -4581,13 +4587,10 @@ static int identity_domain_attach_dev(struct iommu_domain *domain, struct device
- if (dev_is_real_dma_subdevice(dev))
- return 0;
-
-- if (sm_supported(iommu)) {
-+ if (sm_supported(iommu))
- ret = intel_pasid_setup_pass_through(iommu, dev, IOMMU_NO_PASID);
-- if (!ret)
-- iommu_enable_pci_caps(info);
-- } else {
-+ else
- ret = device_setup_pass_through(dev);
-- }
-
- return ret;
- }
---
-2.39.5
-
asoc-qcom-sm8250-explicitly-set-format-in-sm8250_be_.patch
badblocks-fix-a-nonsense-warn_on-which-checks-whethe.patch
coresight-etb10-change-etb_drvdata-spinlock-s-type-t.patch
-iommu-vt-d-move-scalable-mode-ats-enablement-to-prob.patch
iommu-amd-pgtbl_v2-improve-error-handling.patch
cpufreq-tegra186-share-policy-per-cluster.patch
watchdog-aspeed-update-bootstatus-handling.patch
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
- drivers/iommu/intel/iommu.c | 37 +------------------------------
- drivers/iommu/intel/svm.c | 43 +++++++++++++++++++++++++++++++++++++
+ drivers/iommu/intel/iommu.c | 37 +------------------------------------
+ drivers/iommu/intel/svm.c | 43 +++++++++++++++++++++++++++++++++++++++++++
2 files changed, 44 insertions(+), 36 deletions(-)
-diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
-index 7c863c41c8645..6da09345398d9 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
-@@ -3869,41 +3869,6 @@ static struct iommu_group *intel_iommu_device_group(struct device *dev)
+@@ -3863,41 +3863,6 @@ static struct iommu_group *intel_iommu_d
return generic_device_group(dev);
}
static int context_flip_pri(struct device_domain_info *info, bool enable)
{
struct intel_iommu *iommu = info->iommu;
-@@ -4024,7 +3989,7 @@ intel_iommu_dev_enable_feat(struct device *dev, enum iommu_dev_features feat)
+@@ -4018,7 +3983,7 @@ intel_iommu_dev_enable_feat(struct devic
return intel_iommu_enable_iopf(dev);
case IOMMU_DEV_FEAT_SVA:
default:
return -ENODEV;
-diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c
-index f5569347591f2..ba93123cb4eba 100644
--- a/drivers/iommu/intel/svm.c
+++ b/drivers/iommu/intel/svm.c
-@@ -110,6 +110,41 @@ static const struct mmu_notifier_ops intel_mmuops = {
+@@ -110,6 +110,41 @@ static const struct mmu_notifier_ops int
.free_notifier = intel_mm_free_notifier,
};
static int intel_svm_set_dev_pasid(struct iommu_domain *domain,
struct device *dev, ioasid_t pasid,
struct iommu_domain *old)
-@@ -121,6 +156,10 @@ static int intel_svm_set_dev_pasid(struct iommu_domain *domain,
+@@ -121,6 +156,10 @@ static int intel_svm_set_dev_pasid(struc
unsigned long sflags;
int ret = 0;
dev_pasid = domain_add_dev_pasid(domain, dev, pasid);
if (IS_ERR(dev_pasid))
return PTR_ERR(dev_pasid);
-@@ -161,6 +200,10 @@ struct iommu_domain *intel_svm_domain_alloc(struct device *dev,
+@@ -161,6 +200,10 @@ struct iommu_domain *intel_svm_domain_al
struct dmar_domain *domain;
int ret;
domain = kzalloc(sizeof(*domain), GFP_KERNEL);
if (!domain)
return ERR_PTR(-ENOMEM);
---
-2.39.5
-
+++ /dev/null
-From d228a5cb0c72d3ffbf8da4fe02b063992afa0f54 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Mon, 10 Mar 2025 10:47:47 +0800
-Subject: iommu/vt-d: Move scalable mode ATS enablement to probe path
-
-From: Lu Baolu <baolu.lu@linux.intel.com>
-
-[ Upstream commit 5518f239aff1baf772c5748da3add7243c5fb5df ]
-
-Device ATS is currently enabled when a domain is attached to the device
-and disabled when the domain is detached. This creates a limitation:
-when the IOMMU is operating in scalable mode and IOPF is enabled, the
-device's domain cannot be changed.
-
-The previous code enables ATS when a domain is set to a device's RID and
-disables it during RID domain switch. So, if a PASID is set with a
-domain requiring PRI, ATS should remain enabled until the domain is
-removed. During the PASID domain's lifecycle, if the RID's domain
-changes, PRI will be disrupted because it depends on ATS, which is
-disabled when the blocking domain is set for the device's RID.
-
-Remove this limitation by moving ATS enablement to the device probe path.
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Reviewed-by: Kevin Tian <kevin.tian@intel.com>
-Tested-by: Zhangfei Gao <zhangfei.gao@linaro.org>
-Link: https://lore.kernel.org/r/20250228092631.3425464-5-baolu.lu@linux.intel.com
-Signed-off-by: Joerg Roedel <jroedel@suse.de>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- drivers/iommu/intel/iommu.c | 51 ++++++++++++++++++++-----------------
- 1 file changed, 27 insertions(+), 24 deletions(-)
-
-diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
-index 07adf4ceeea06..7c863c41c8645 100644
---- a/drivers/iommu/intel/iommu.c
-+++ b/drivers/iommu/intel/iommu.c
-@@ -1172,32 +1172,28 @@ static bool dev_needs_extra_dtlb_flush(struct pci_dev *pdev)
- return true;
- }
-
--static void iommu_enable_pci_caps(struct device_domain_info *info)
-+static void iommu_enable_pci_ats(struct device_domain_info *info)
- {
- struct pci_dev *pdev;
-
-- if (!dev_is_pci(info->dev))
-+ if (!info->ats_supported)
- return;
-
- pdev = to_pci_dev(info->dev);
-- if (info->ats_supported && pci_ats_page_aligned(pdev) &&
-- !pci_enable_ats(pdev, VTD_PAGE_SHIFT))
-+ if (!pci_ats_page_aligned(pdev))
-+ return;
-+
-+ if (!pci_enable_ats(pdev, VTD_PAGE_SHIFT))
- info->ats_enabled = 1;
- }
-
--static void iommu_disable_pci_caps(struct device_domain_info *info)
-+static void iommu_disable_pci_ats(struct device_domain_info *info)
- {
-- struct pci_dev *pdev;
--
-- if (!dev_is_pci(info->dev))
-+ if (!info->ats_enabled)
- return;
-
-- pdev = to_pci_dev(info->dev);
--
-- if (info->ats_enabled) {
-- pci_disable_ats(pdev);
-- info->ats_enabled = 0;
-- }
-+ pci_disable_ats(to_pci_dev(info->dev));
-+ info->ats_enabled = 0;
- }
-
- static void intel_flush_iotlb_all(struct iommu_domain *domain)
-@@ -1556,12 +1552,19 @@ domain_context_mapping(struct dmar_domain *domain, struct device *dev)
- struct device_domain_info *info = dev_iommu_priv_get(dev);
- struct intel_iommu *iommu = info->iommu;
- u8 bus = info->bus, devfn = info->devfn;
-+ int ret;
-
- if (!dev_is_pci(dev))
- return domain_context_mapping_one(domain, iommu, bus, devfn);
-
-- return pci_for_each_dma_alias(to_pci_dev(dev),
-- domain_context_mapping_cb, domain);
-+ ret = pci_for_each_dma_alias(to_pci_dev(dev),
-+ domain_context_mapping_cb, domain);
-+ if (ret)
-+ return ret;
-+
-+ iommu_enable_pci_ats(info);
-+
-+ return 0;
- }
-
- /* Return largest possible superpage level for a given mapping */
-@@ -1843,8 +1846,6 @@ static int dmar_domain_attach_device(struct dmar_domain *domain,
- if (ret)
- goto out_block_translation;
-
-- iommu_enable_pci_caps(info);
--
- ret = cache_tag_assign_domain(domain, dev, IOMMU_NO_PASID);
- if (ret)
- goto out_block_translation;
-@@ -3210,6 +3211,7 @@ static void domain_context_clear(struct device_domain_info *info)
-
- pci_for_each_dma_alias(to_pci_dev(info->dev),
- &domain_context_clear_one_cb, info);
-+ iommu_disable_pci_ats(info);
- }
-
- /*
-@@ -3226,7 +3228,6 @@ void device_block_translation(struct device *dev)
- if (info->domain)
- cache_tag_unassign_domain(info->domain, dev, IOMMU_NO_PASID);
-
-- iommu_disable_pci_caps(info);
- if (!dev_is_real_dma_subdevice(dev)) {
- if (sm_supported(iommu))
- intel_pasid_tear_down_entry(iommu, dev,
-@@ -3761,6 +3762,9 @@ static struct iommu_device *intel_iommu_probe_device(struct device *dev)
- !pci_enable_pasid(pdev, info->pasid_supported & ~1))
- info->pasid_enabled = 1;
-
-+ if (sm_supported(iommu))
-+ iommu_enable_pci_ats(info);
-+
- return &iommu->iommu;
- free_table:
- intel_pasid_free_table(dev);
-@@ -3777,6 +3781,8 @@ static void intel_iommu_release_device(struct device *dev)
- struct device_domain_info *info = dev_iommu_priv_get(dev);
- struct intel_iommu *iommu = info->iommu;
-
-+ iommu_disable_pci_ats(info);
-+
- if (info->pasid_enabled) {
- pci_disable_pasid(to_pci_dev(dev));
- info->pasid_enabled = 0;
-@@ -4415,13 +4421,10 @@ static int identity_domain_attach_dev(struct iommu_domain *domain, struct device
- if (dev_is_real_dma_subdevice(dev))
- return 0;
-
-- if (sm_supported(iommu)) {
-+ if (sm_supported(iommu))
- ret = intel_pasid_setup_pass_through(iommu, dev, IOMMU_NO_PASID);
-- if (!ret)
-- iommu_enable_pci_caps(info);
-- } else {
-+ else
- ret = device_setup_pass_through(dev);
-- }
-
- return ret;
- }
---
-2.39.5
-
block-acquire-q-limits_lock-while-reading-sysfs-attr.patch
coresight-etb10-change-etb_drvdata-spinlock-s-type-t.patch
coresight-change-coresight_trace_id_map-s-lock-type-.patch
-iommu-vt-d-move-scalable-mode-ats-enablement-to-prob.patch
iommu-vt-d-check-if-sva-is-supported-when-attaching-.patch
iommu-amd-pgtbl_v2-improve-error-handling.patch
fs-pipe-limit-the-slots-in-pipe_resize_ring.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
