re PR target/62631 (gcc.dg/tree-ssa/ivopts-lt-2.c FAILs)

	PR target/62631
	* config/sparc/sparc.h (TARGET_HARD_MUL): Remove TARGET_V8PLUS.
	(TARGET_HARD_MUL32): Rewrite based on TARGET_HARD_MUL.
	* config/sparc/sparc.c (sparc_rtx_costs) <MULT>: Return costs based on
	int_mulX for integers in 64-bit mode if TARGET_HARD_MUL is not set.

From-SVN: r220369

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8764b12f47c13db6600f2ddf6ab4bb5fe306843d..855a76d0f1c5aab3d28655093b4e3de3db2c49e3 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2015-02-03  Eric Botcazou  <ebotcazou@adacore.com>
+
+       PR target/62631
+       * config/sparc/sparc.h (TARGET_HARD_MUL): Remove TARGET_V8PLUS.
+       (TARGET_HARD_MUL32): Rewrite based on TARGET_HARD_MUL.
+       * config/sparc/sparc.c (sparc_rtx_costs) <MULT>: Return costs based on
+       int_mulX for integers in 64-bit mode if TARGET_HARD_MUL is not set.
+
 2015-02-03  Jakub Jelinek  <jakub@redhat.com>
 
        PR other/63504

diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 19e45c23fca408b0bb06c42a8aa7602bfba66db7..0cf2649ab97767d520df12dd2a9e8c489748bd53 100644 (file)
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -11075,7 +11075,7 @@ sparc_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
     case MULT:
       if (float_mode_p)
        *total = sparc_costs->float_mul;
-      else if (! TARGET_HARD_MUL)
+      else if (TARGET_ARCH32 && !TARGET_HARD_MUL)
        *total = COSTS_N_INSNS (25);
       else
        {
@@ -11113,7 +11113,7 @@ sparc_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
              bit_cost = COSTS_N_INSNS (bit_cost);
            }
 
-         if (mode == DImode)
+         if (mode == DImode || !TARGET_HARD_MUL)
            *total = sparc_costs->int_mulX + bit_cost;
          else
            *total = sparc_costs->int_mul + bit_cost;

diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index 48f3f6d9ced697f27b12047726c0b42cb7f9ac49..c6100a1f233dc8cf2900cb44e9a41c2fa66abe5e 100644 (file)
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -426,22 +426,20 @@ extern enum cmodel sparc_cmodel;
 #define WCHAR_TYPE_SIZE 16
 \f
 /* Mask of all CPU selection flags.  */
-#define MASK_ISA \
-(MASK_V8 + MASK_SPARCLITE + MASK_SPARCLET + MASK_V9 + MASK_DEPRECATED_V8_INSNS)
+#define MASK_ISA                                       \
+  (MASK_SPARCLITE + MASK_SPARCLET                      \
+   + MASK_V8 + MASK_V9 + MASK_DEPRECATED_V8_INSNS)
 
-/* TARGET_HARD_MUL: Use hardware multiply instructions but not %y.
-   TARGET_HARD_MUL32: Use hardware multiply instructions with rd %y
-   to get high 32 bits.  False in V8+ or V9 because multiply stores
-   a 64-bit result in a register.  */
-
-#define TARGET_HARD_MUL32                              \
-  ((TARGET_V8 || TARGET_SPARCLITE                      \
-    || TARGET_SPARCLET || TARGET_DEPRECATED_V8_INSNS)  \
-   && ! TARGET_V8PLUS && TARGET_ARCH32)
+/* TARGET_HARD_MUL: Use 32-bit hardware multiply instructions but not %y.  */
+#define TARGET_HARD_MUL                                \
+  (TARGET_SPARCLITE || TARGET_SPARCLET         \
+   || TARGET_V8 || TARGET_DEPRECATED_V8_INSNS)
 
-#define TARGET_HARD_MUL                                        \
-  (TARGET_V8 || TARGET_SPARCLITE || TARGET_SPARCLET    \
-   || TARGET_DEPRECATED_V8_INSNS || TARGET_V8PLUS)
+/* TARGET_HARD_MUL32: Use 32-bit hardware multiply instructions with %y
+   to get high 32 bits.  False in 64-bit or V8+ because multiply stores
+   a 64-bit result in a register.  */
+#define TARGET_HARD_MUL32 \
+  (TARGET_HARD_MUL && TARGET_ARCH32 && !TARGET_V8PLUS)
 
 /* MASK_APP_REGS must always be the default because that's what
    FIXED_REGISTERS is set to and -ffixed- is processed before