u32 val;
int ret;
- regmap_update_bits(branch.clkr.regmap, mem_br->mem_enable_reg,
- mem_br->mem_enable_ack_mask, mem_br->mem_enable_ack_mask);
+ regmap_assign_bits(branch.clkr.regmap, mem_br->mem_enable_reg,
+ mem_br->mem_enable_mask, !mem_br->mem_enable_invert);
ret = regmap_read_poll_timeout(branch.clkr.regmap, mem_br->mem_ack_reg,
val, val & mem_br->mem_enable_ack_mask, 0, 200);
{
struct clk_mem_branch *mem_br = to_clk_mem_branch(hw);
- regmap_update_bits(mem_br->branch.clkr.regmap, mem_br->mem_enable_reg,
- mem_br->mem_enable_ack_mask, 0);
+ regmap_assign_bits(mem_br->branch.clkr.regmap, mem_br->mem_enable_reg,
+ mem_br->mem_enable_mask, mem_br->mem_enable_invert);
return clk_branch2_disable(hw);
}