ARM: dts: renesas: r9a06g032-rzn1d400-db: Add pinmux for the CPLD

The CPLD has no dedicated driver, so apply the pinmux settings with the
pinmux driver instead.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250508074311.20343-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
index 328cb35547d791c31cee63007208f39d7e0b033a..2de047393652c7ccc7112d068aec74dc2065dda2 100644 (file)
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
@@ -170,6 +170,9 @@
 };
 
 &pinctrl {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pins_cpld>;
+
        pins_can0: pins_can0 {
                pinmux = <RZN1_PINMUX(162, RZN1_FUNC_CAN)>,     /* CAN0_TXD */
                         <RZN1_PINMUX(163, RZN1_FUNC_CAN)>;     /* CAN0_RXD */
@@ -182,6 +185,13 @@
                drive-strength = <6>;
        };
 
+       pins_cpld: pins-cpld {
+               pinmux = <RZN1_PINMUX(119, RZN1_FUNC_USB)>,
+                        <RZN1_PINMUX(120, RZN1_FUNC_USB)>,
+                        <RZN1_PINMUX(121, RZN1_FUNC_USB)>,
+                        <RZN1_PINMUX(122, RZN1_FUNC_USB)>;
+       };
+
        pins_eth3: pins_eth3 {
                pinmux = <RZN1_PINMUX(36, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
                         <RZN1_PINMUX(37, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,