]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/i915: add out_value to intel_wait_for_register_fw() and intel_de_wait_fw()
authorJani Nikula <jani.nikula@intel.com>
Tue, 27 May 2025 10:59:11 +0000 (13:59 +0300)
committerJani Nikula <jani.nikula@intel.com>
Wed, 4 Jun 2025 13:28:35 +0000 (16:28 +0300)
Future users of intel_de_wait_fw() need the final value. Just return it
for everyone using intel_wait_for_register_fw() and intel_de_wait_fw()
to avoid adding or using another set of specialized functions. There
aren't that many users for these anyway.

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Link: https://lore.kernel.org/r/f804b2fe85ad63389e74d82e4c97220e9275f170.1748343520.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_de.h
drivers/gpu/drm/i915/display/intel_dpio_phy.c
drivers/gpu/drm/i915/display/intel_gmbus.c
drivers/gpu/drm/i915/display/intel_sbi.c
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
drivers/gpu/drm/i915/intel_uncore.c
drivers/gpu/drm/i915/intel_uncore.h
drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h

index 823290e0cf7dd816c3af5833ececb56c6358aa98..9ecdcf6b73e4d4abdea08c9cbfaf00053360de7c 100644 (file)
@@ -141,14 +141,14 @@ intel_de_wait(struct intel_display *display, i915_reg_t reg,
 
 static inline int
 intel_de_wait_fw(struct intel_display *display, i915_reg_t reg,
-                u32 mask, u32 value, unsigned int timeout_ms)
+                u32 mask, u32 value, unsigned int timeout_ms, u32 *out_value)
 {
        int ret;
 
        intel_dmc_wl_get(display, reg);
 
        ret = intel_wait_for_register_fw(__to_uncore(display), reg, mask,
-                                        value, timeout_ms);
+                                        value, timeout_ms, out_value);
 
        intel_dmc_wl_put(display, reg);
 
index 552dd984ade95830b7e65d0cb5ea8798ddd2dec3..0282c0b2440b1e45916e946c07f1d019280b613b 100644 (file)
@@ -428,7 +428,7 @@ static void _bxt_dpio_phy_init(struct intel_display *display, enum dpio_phy phy)
         * use 1ms due to occasional timeouts observed with that.
         */
        if (intel_de_wait_fw(display, BXT_PORT_CL1CM_DW0(phy),
-                            PHY_RESERVED | PHY_POWER_GOOD, PHY_POWER_GOOD, 1))
+                            PHY_RESERVED | PHY_POWER_GOOD, PHY_POWER_GOOD, 1, NULL))
                drm_err(display->drm, "timeout during PHY%d power on\n",
                        phy);
 
index d55cc77650b797260a47e1f95b660001b462da21..88494bd4f968a3ef1704039c1acc0fd91fa7d67b 100644 (file)
@@ -414,7 +414,7 @@ gmbus_wait_idle(struct intel_display *display)
        add_wait_queue(&display->gmbus.wait_queue, &wait);
        intel_de_write_fw(display, GMBUS4(display), irq_enable);
 
-       ret = intel_de_wait_fw(display, GMBUS2(display), GMBUS_ACTIVE, 0, 10);
+       ret = intel_de_wait_fw(display, GMBUS2(display), GMBUS_ACTIVE, 0, 10, NULL);
 
        intel_de_write_fw(display, GMBUS4(display), 0);
        remove_wait_queue(&display->gmbus.wait_queue, &wait);
index 198a1ad280e283e0cb00264954d1172be537035b..135f190cf653d23be4454f64a07e721b8c764d5b 100644 (file)
@@ -23,7 +23,7 @@ static int intel_sbi_rw(struct intel_display *display, u16 reg,
 
        if (intel_wait_for_register_fw(uncore,
                                       SBI_CTL_STAT, SBI_BUSY, 0,
-                                      100)) {
+                                      100, NULL)) {
                drm_err(display->drm, "timeout waiting for SBI to become ready\n");
                return -EBUSY;
        }
index ec33ad942115abd980f6ee83f2f9080165c81a13..e848a04a80dc291b1d0917a48fe413d2e3bd90a7 100644 (file)
@@ -1116,7 +1116,7 @@ static int uc_fw_xfer(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags)
                              _MASKED_BIT_ENABLE(dma_flags | START_DMA));
 
        /* Wait for DMA to finish */
-       ret = intel_wait_for_register_fw(uncore, DMA_CTRL, START_DMA, 0, 100);
+       ret = intel_wait_for_register_fw(uncore, DMA_CTRL, START_DMA, 0, 100, NULL);
        if (ret)
                gt_err(gt, "DMA for %s fw failed, DMA_CTRL=%u\n",
                       intel_uc_fw_type_repr(uc_fw->type),
index 9b2254d8649174e50c0ba2fd5e5f9afbe38a28aa..c8e29fd72290ab3ff8b8884c45899cf30e13bbdf 100644 (file)
@@ -2644,7 +2644,7 @@ static void driver_initiated_flr(struct intel_uncore *uncore)
         * is still pending (unless the HW is totally dead), but better to be
         * safe in case something unexpected happens
         */
-       ret = intel_wait_for_register_fw(uncore, GU_CNTL, DRIVERFLR, 0, flr_timeout_ms);
+       ret = intel_wait_for_register_fw(uncore, GU_CNTL, DRIVERFLR, 0, flr_timeout_ms, NULL);
        if (ret) {
                drm_err(&i915->drm,
                        "Failed to wait for Driver-FLR bit to clear! %d\n",
@@ -2659,7 +2659,7 @@ static void driver_initiated_flr(struct intel_uncore *uncore)
        /* Wait for hardware teardown to complete */
        ret = intel_wait_for_register_fw(uncore, GU_CNTL,
                                         DRIVERFLR, 0,
-                                        flr_timeout_ms);
+                                        flr_timeout_ms, NULL);
        if (ret) {
                drm_err(&i915->drm, "Driver-FLR-teardown wait completion failed! %d\n", ret);
                return;
@@ -2668,7 +2668,7 @@ static void driver_initiated_flr(struct intel_uncore *uncore)
        /* Wait for hardware/firmware re-init to complete */
        ret = intel_wait_for_register_fw(uncore, GU_DEBUG,
                                         DRIVERFLR_STATUS, DRIVERFLR_STATUS,
-                                        flr_timeout_ms);
+                                        flr_timeout_ms, NULL);
        if (ret) {
                drm_err(&i915->drm, "Driver-FLR-reinit wait completion failed! %d\n", ret);
                return;
index e3958295062745a3c21ed169e21aa7caaf9dbdf7..6048b99b96cb99f1d76cc7cf3a09d9a0b513d379 100644 (file)
@@ -313,10 +313,11 @@ intel_wait_for_register_fw(struct intel_uncore *uncore,
                           i915_reg_t reg,
                           u32 mask,
                           u32 value,
-                              unsigned int timeout_ms)
+                          unsigned int timeout_ms,
+                          u32 *out_value)
 {
        return __intel_wait_for_register_fw(uncore, reg, mask, value,
-                                           2, timeout_ms, NULL);
+                                           2, timeout_ms, out_value);
 }
 
 #define IS_GSI_REG(reg) ((reg) < 0x40000)
index 0c1e88e36a1e2f742f2171836f6fd743ec35743c..797091cf1c99d328fdb958b7381cb2b54299cc86 100644 (file)
@@ -110,12 +110,13 @@ static inline int intel_wait_for_register(struct intel_uncore *uncore,
 
 static inline int intel_wait_for_register_fw(struct intel_uncore *uncore,
                                             i915_reg_t i915_reg, u32 mask,
-                                            u32 value, unsigned int timeout)
+                                            u32 value, unsigned int timeout,
+                                            u32 *out_value)
 {
        struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg));
 
        return xe_mmio_wait32(__compat_uncore_to_mmio(uncore), reg, mask, value,
-                             timeout * USEC_PER_MSEC, NULL, false);
+                             timeout * USEC_PER_MSEC, out_value, false);
 }
 
 static inline int