]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
arm.c (arm_cortex_a15_tune): New tune.
authorSameera Deshpande <sameera.deshpande@arm.com>
Fri, 20 Jul 2012 17:12:03 +0000 (22:42 +0530)
committerGreta Yorsh <gretay@gcc.gnu.org>
Fri, 20 Jul 2012 17:12:03 +0000 (18:12 +0100)
gcc/

2012-07-20  Sameera Deshpande  <sameera.deshpande@arm.com>
            Greta Yorsh  <Greta.Yorsh@arm.com>

        * config/arm/arm.c (arm_cortex_a15_tune): New tune.
        * config/arm/arm-cores.def (cortex-a15): Use it.

Co-Authored-By: Greta Yorsh <greta.yorsh@arm.com>
From-SVN: r189723

gcc/ChangeLog
gcc/config/arm/arm-cores.def
gcc/config/arm/arm.c

index ca0526819d7c0dc827be223c244dd9f297571678..8de3f97b1774f5d23d2a4a9fb60ead9437dc30e2 100644 (file)
@@ -1,3 +1,9 @@
+2012-07-20  Sameera Deshpande  <sameera.deshpande@arm.com>
+            Greta Yorsh  <Greta.Yorsh@arm.com>
+
+        * config/arm/arm.c (arm_cortex_a15_tune): New tune.
+        * config/arm/arm-cores.def (cortex-a15): Use it.
+
 2012-07-20  Sameera Deshpande  <sameera.deshpande@arm.com>
             Greta Yorsh  <Greta.Yorsh@arm.com>
 
index 223e41f4fbc3aa1e81557bb1a08079057cf5c031..9eb426286938a7d2113d0b5c5c46950199a7b6dc 100644 (file)
@@ -129,7 +129,7 @@ ARM_CORE("cortex-a5",         cortexa5,     7A,                              FL_LDSCHED, cortex_a5)
 ARM_CORE("cortex-a7",    cortexa7,     7A,                              FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex)
 ARM_CORE("cortex-a8",    cortexa8,     7A,                              FL_LDSCHED, cortex)
 ARM_CORE("cortex-a9",    cortexa9,     7A,                              FL_LDSCHED, cortex_a9)
-ARM_CORE("cortex-a15",   cortexa15,    7A,                              FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex)
+ARM_CORE("cortex-a15",   cortexa15,    7A,                              FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)
 ARM_CORE("cortex-r4",    cortexr4,     7R,                              FL_LDSCHED, cortex)
 ARM_CORE("cortex-r4f",   cortexr4f,    7R,                              FL_LDSCHED, cortex)
 ARM_CORE("cortex-r5",    cortexr5,     7R,                              FL_LDSCHED | FL_ARM_DIV, cortex)
index d463caf5cbc562046e8a0465fccd515f0bc0dfc9..d5316fef64177e84d9abe59642b484844457a254 100644 (file)
@@ -955,6 +955,18 @@ const struct tune_params arm_cortex_tune =
   false                                         /* Prefer LDRD/STRD.  */
 };
 
+const struct tune_params arm_cortex_a15_tune =
+{
+  arm_9e_rtx_costs,
+  NULL,
+  1,                                           /* Constant limit.  */
+  5,                                           /* Max cond insns.  */
+  ARM_PREFETCH_NOT_BENEFICIAL,
+  false,                                       /* Prefer constant pool.  */
+  arm_default_branch_cost,
+  true                                          /* Prefer LDRD/STRD.  */
+};
+
 /* Branches can be dual-issued on Cortex-A5, so conditional execution is
    less appealing.  Set max_insns_skipped to a low value.  */