struct npcm_wdt *wdt = to_npcm_wdt(wdd);
u32 val;
- if (wdt->clk)
- clk_prepare_enable(wdt->clk);
+ clk_prepare_enable(wdt->clk);
if (wdd->timeout < 2)
val = 0x800;
writel(0, wdt->reg);
- if (wdt->clk)
- clk_disable_unprepare(wdt->clk);
+ clk_disable_unprepare(wdt->clk);
return 0;
}
struct npcm_wdt *wdt = to_npcm_wdt(wdd);
/* For reset, we start the WDT clock and leave it running. */
- if (wdt->clk)
- clk_prepare_enable(wdt->clk);
+ clk_prepare_enable(wdt->clk);
writel(NPCM_WTR | NPCM_WTRE | NPCM_WTE, wdt->reg);
udelay(1000);