--- /dev/null
+From 7303b39e46b2f523334591f05fd9566cf929eb26 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Michel=20D=C3=A4nzer?= <michel.daenzer@amd.com>
+Date: Thu, 14 Jun 2018 13:02:07 +0200
+Subject: drm/amdgpu: Make amdgpu_vram_mgr_bo_invisible_size always accurate
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Michel Dänzer <michel.daenzer@amd.com>
+
+commit 7303b39e46b2f523334591f05fd9566cf929eb26 upstream.
+
+Even BOs with AMDGPU_GEM_CREATE_NO_CPU_ACCESS may end up at least
+partially in CPU visible VRAM, in particular when all VRAM is visible.
+
+v2:
+* Don't take VRAM mgr spinlock, not needed (Christian König)
+* Make loop logic simpler and clearer.
+
+Cc: stable@vger.kernel.org
+Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 20 ++++++++++++++++++--
+ 1 file changed, 18 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+@@ -111,10 +111,26 @@ static u64 amdgpu_vram_mgr_vis_size(stru
+ */
+ u64 amdgpu_vram_mgr_bo_invisible_size(struct amdgpu_bo *bo)
+ {
+- if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
++ struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
++ struct ttm_mem_reg *mem = &bo->tbo.mem;
++ struct drm_mm_node *nodes = mem->mm_node;
++ unsigned pages = mem->num_pages;
++ u64 usage = 0;
++
++ if (adev->gmc.visible_vram_size == adev->gmc.real_vram_size)
++ return 0;
++
++ if (mem->start >= adev->gmc.visible_vram_size >> PAGE_SHIFT)
+ return amdgpu_bo_size(bo);
+
+- return 0;
++ while (nodes && pages) {
++ usage += nodes->size << PAGE_SHIFT;
++ usage -= amdgpu_vram_mgr_vis_size(adev, nodes);
++ pages -= nodes->size;
++ ++nodes;
++ }
++
++ return usage;
+ }
+
+ /**
--- /dev/null
+From 5e9244ff585239630f15f8ad8e676bc91a94ca9e Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Michel=20D=C3=A4nzer?= <michel.daenzer@amd.com>
+Date: Tue, 12 Jun 2018 12:07:33 +0200
+Subject: drm/amdgpu: Refactor amdgpu_vram_mgr_bo_invisible_size helper
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Michel Dänzer <michel.daenzer@amd.com>
+
+commit 5e9244ff585239630f15f8ad8e676bc91a94ca9e upstream.
+
+Preparation for the following fix, no functional change intended.
+
+Cc: stable@vger.kernel.org
+Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 6 ++----
+ drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 1 +
+ drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 16 ++++++++++++++++
+ 3 files changed, 19 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+@@ -747,8 +747,7 @@ int amdgpu_bo_pin_restricted(struct amdg
+ }
+ if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
+ adev->vram_pin_size += amdgpu_bo_size(bo);
+- if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
+- adev->invisible_pin_size += amdgpu_bo_size(bo);
++ adev->invisible_pin_size += amdgpu_vram_mgr_bo_invisible_size(bo);
+ } else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
+ adev->gart_pin_size += amdgpu_bo_size(bo);
+ }
+@@ -786,8 +785,7 @@ int amdgpu_bo_unpin(struct amdgpu_bo *bo
+
+ if (bo->tbo.mem.mem_type == TTM_PL_VRAM) {
+ adev->vram_pin_size -= amdgpu_bo_size(bo);
+- if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
+- adev->invisible_pin_size -= amdgpu_bo_size(bo);
++ adev->invisible_pin_size -= amdgpu_vram_mgr_bo_invisible_size(bo);
+ } else if (bo->tbo.mem.mem_type == TTM_PL_TT) {
+ adev->gart_pin_size -= amdgpu_bo_size(bo);
+ }
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+@@ -64,6 +64,7 @@ extern const struct ttm_mem_type_manager
+ bool amdgpu_gtt_mgr_is_allocated(struct ttm_mem_reg *mem);
+ uint64_t amdgpu_gtt_mgr_usage(struct ttm_mem_type_manager *man);
+
++u64 amdgpu_vram_mgr_bo_invisible_size(struct amdgpu_bo *bo);
+ uint64_t amdgpu_vram_mgr_usage(struct ttm_mem_type_manager *man);
+ uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_mem_type_manager *man);
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+@@ -102,6 +102,22 @@ static u64 amdgpu_vram_mgr_vis_size(stru
+ }
+
+ /**
++ * amdgpu_vram_mgr_bo_invisible_size - CPU invisible BO size
++ *
++ * @bo: &amdgpu_bo buffer object (must be in VRAM)
++ *
++ * Returns:
++ * How much of the given &amdgpu_bo buffer object lies in CPU invisible VRAM.
++ */
++u64 amdgpu_vram_mgr_bo_invisible_size(struct amdgpu_bo *bo)
++{
++ if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
++ return amdgpu_bo_size(bo);
++
++ return 0;
++}
++
++/**
+ * amdgpu_vram_mgr_new - allocate new ranges
+ *
+ * @man: TTM memory type manager
--- /dev/null
+From 6fa39bc1e01dab8b4f54b23e95a181a2ed5a2d38 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Michel=20D=C3=A4nzer?= <michel.daenzer@amd.com>
+Date: Fri, 8 Jun 2018 12:58:15 +0200
+Subject: drm/amdgpu: Use kvmalloc_array for allocating VRAM manager nodes array
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Michel Dänzer <michel.daenzer@amd.com>
+
+commit 6fa39bc1e01dab8b4f54b23e95a181a2ed5a2d38 upstream.
+
+It can be quite big, and there's no need for it to be physically
+contiguous. This is less likely to fail under memory pressure (has
+actually happened while running piglit).
+
+Cc: stable@vger.kernel.org
+Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 7 ++++---
+ 1 file changed, 4 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+@@ -140,7 +140,8 @@ static int amdgpu_vram_mgr_new(struct tt
+ num_nodes = DIV_ROUND_UP(mem->num_pages, pages_per_node);
+ }
+
+- nodes = kcalloc(num_nodes, sizeof(*nodes), GFP_KERNEL);
++ nodes = kvmalloc_array(num_nodes, sizeof(*nodes),
++ GFP_KERNEL | __GFP_ZERO);
+ if (!nodes)
+ return -ENOMEM;
+
+@@ -195,7 +196,7 @@ error:
+ drm_mm_remove_node(&nodes[i]);
+ spin_unlock(&mgr->lock);
+
+- kfree(nodes);
++ kvfree(nodes);
+ return r == -ENOSPC ? 0 : r;
+ }
+
+@@ -234,7 +235,7 @@ static void amdgpu_vram_mgr_del(struct t
+ atomic64_sub(usage, &mgr->usage);
+ atomic64_sub(vis_usage, &mgr->vis_usage);
+
+- kfree(mem->mm_node);
++ kvfree(mem->mm_node);
+ mem->mm_node = NULL;
+ }
+
--- /dev/null
+From 9fcf2b3c1c0276650fea537c71b513d27d929b05 Mon Sep 17 00:00:00 2001
+From: Stefan Agner <stefan@agner.ch>
+Date: Sun, 17 Jun 2018 10:48:22 +0200
+Subject: drm/atmel-hlcdc: check stride values in the first plane
+
+From: Stefan Agner <stefan@agner.ch>
+
+commit 9fcf2b3c1c0276650fea537c71b513d27d929b05 upstream.
+
+The statement always evaluates to true since the struct fields
+are arrays. This has shown up as a warning when compiling with
+clang:
+ warning: address of array 'desc->layout.xstride' will always
+ evaluate to 'true' [-Wpointer-bool-conversion]
+
+Check for values in the first plane instead.
+
+Fixes: 1a396789f65a ("drm: add Atmel HLCDC Display Controller support")
+Cc: <stable@vger.kernel.org>
+Signed-off-by: Stefan Agner <stefan@agner.ch>
+Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20180617084826.31885-1-stefan@agner.ch
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
++++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
+@@ -889,7 +889,7 @@ static int atmel_hlcdc_plane_init_proper
+ drm_object_attach_property(&plane->base.base,
+ props->alpha, 255);
+
+- if (desc->layout.xstride && desc->layout.pstride) {
++ if (desc->layout.xstride[0] && desc->layout.pstride[0]) {
+ int ret;
+
+ ret = drm_plane_create_rotation_property(&plane->base,
--- /dev/null
+From 7a3727f385dc64773db1c144f6b15c1e9d4735bb Mon Sep 17 00:00:00 2001
+From: Kenneth Graunke <kenneth@whitecape.org>
+Date: Fri, 15 Jun 2018 20:06:05 +0100
+Subject: drm/i915: Enable provoking vertex fix on Gen9 systems.
+
+From: Kenneth Graunke <kenneth@whitecape.org>
+
+commit 7a3727f385dc64773db1c144f6b15c1e9d4735bb upstream.
+
+The SF and clipper units mishandle the provoking vertex in some cases,
+which can cause misrendering with shaders that use flat shaded inputs.
+
+There are chicken bits in 3D_CHICKEN3 (for SF) and FF_SLICE_CHICKEN
+(for the clipper) that work around the issue. These registers are
+unfortunately not part of the logical context (even the power context),
+and so we must reload them every time we start executing in a context.
+
+Bugzilla: https://bugs.freedesktop.org/103047
+Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Link: https://patchwork.freedesktop.org/patch/msgid/20180615190605.16238-1-chris@chris-wilson.co.uk
+Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
+Cc: stable@vger.kernel.org
+(cherry picked from commit b77422f80337d363eed60c8c48db9cb6e33085c9)
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/i915_reg.h | 5 +++++
+ drivers/gpu/drm/i915/intel_lrc.c | 12 +++++++++++-
+ 2 files changed, 16 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/i915/i915_reg.h
++++ b/drivers/gpu/drm/i915/i915_reg.h
+@@ -2484,12 +2484,17 @@ enum i915_power_well_id {
+ #define _3D_CHICKEN _MMIO(0x2084)
+ #define _3D_CHICKEN_HIZ_PLANE_DISABLE_MSAA_4X_SNB (1 << 10)
+ #define _3D_CHICKEN2 _MMIO(0x208c)
++
++#define FF_SLICE_CHICKEN _MMIO(0x2088)
++#define FF_SLICE_CHICKEN_CL_PROVOKING_VERTEX_FIX (1 << 1)
++
+ /* Disables pipelining of read flushes past the SF-WIZ interface.
+ * Required on all Ironlake steppings according to the B-Spec, but the
+ * particular danger of not doing so is not specified.
+ */
+ # define _3D_CHICKEN2_WM_READ_PIPELINED (1 << 14)
+ #define _3D_CHICKEN3 _MMIO(0x2090)
++#define _3D_CHICKEN_SF_PROVOKING_VERTEX_FIX (1 << 12)
+ #define _3D_CHICKEN_SF_DISABLE_OBJEND_CULL (1 << 10)
+ #define _3D_CHICKEN3_SF_DISABLE_FASTCLIP_CULL (1 << 5)
+ #define _3D_CHICKEN_SDE_LIMIT_FIFO_POLY_DEPTH(x) ((x)<<1) /* gen8+ */
+--- a/drivers/gpu/drm/i915/intel_lrc.c
++++ b/drivers/gpu/drm/i915/intel_lrc.c
+@@ -1067,11 +1067,21 @@ static u32 *gen9_init_indirectctx_bb(str
+ /* WaFlushCoherentL3CacheLinesAtContextSwitch:skl,bxt,glk */
+ batch = gen8_emit_flush_coherentl3_wa(engine, batch);
+
++ *batch++ = MI_LOAD_REGISTER_IMM(3);
++
+ /* WaDisableGatherAtSetShaderCommonSlice:skl,bxt,kbl,glk */
+- *batch++ = MI_LOAD_REGISTER_IMM(1);
+ *batch++ = i915_mmio_reg_offset(COMMON_SLICE_CHICKEN2);
+ *batch++ = _MASKED_BIT_DISABLE(
+ GEN9_DISABLE_GATHER_AT_SET_SHADER_COMMON_SLICE);
++
++ /* BSpec: 11391 */
++ *batch++ = i915_mmio_reg_offset(FF_SLICE_CHICKEN);
++ *batch++ = _MASKED_BIT_ENABLE(FF_SLICE_CHICKEN_CL_PROVOKING_VERTEX_FIX);
++
++ /* BSpec: 11299 */
++ *batch++ = i915_mmio_reg_offset(_3D_CHICKEN3);
++ *batch++ = _MASKED_BIT_ENABLE(_3D_CHICKEN_SF_PROVOKING_VERTEX_FIX);
++
+ *batch++ = MI_NOOP;
+
+ /* WaClearSlmSpaceAtContextSwitch:kbl */
--- /dev/null
+From 889ad63d41eea20184b0483e7e585e5b20fb6cfe Mon Sep 17 00:00:00 2001
+From: Jeremy Cline <jcline@redhat.com>
+Date: Fri, 1 Jun 2018 16:05:32 -0400
+Subject: drm/qxl: Call qxl_bo_unref outside atomic context
+
+From: Jeremy Cline <jcline@redhat.com>
+
+commit 889ad63d41eea20184b0483e7e585e5b20fb6cfe upstream.
+
+"qxl_bo_unref" may sleep, but calling "qxl_release_map" causes
+"preempt_disable()" to be called and "preempt_enable()" isn't called
+until "qxl_release_unmap" is used. Move the call to "qxl_bo_unref" out
+from in between the two to avoid sleeping from an atomic context.
+
+This issue can be demonstrated on a kernel with CONFIG_LOCKDEP=y by
+creating a VM using QXL, using a desktop environment using Xorg, then
+moving the cursor on or off a window.
+
+Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1571128
+Fixes: 9428088c90b6 ("drm/qxl: reapply cursor after resetting primary")
+Cc: stable@vger.kernel.org
+Signed-off-by: Jeremy Cline <jcline@redhat.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/20180601200532.13619-1-jcline@redhat.com
+Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/qxl/qxl_display.c | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/qxl/qxl_display.c
++++ b/drivers/gpu/drm/qxl/qxl_display.c
+@@ -630,7 +630,7 @@ static void qxl_cursor_atomic_update(str
+ struct qxl_cursor_cmd *cmd;
+ struct qxl_cursor *cursor;
+ struct drm_gem_object *obj;
+- struct qxl_bo *cursor_bo = NULL, *user_bo = NULL;
++ struct qxl_bo *cursor_bo = NULL, *user_bo = NULL, *old_cursor_bo = NULL;
+ int ret;
+ void *user_ptr;
+ int size = 64*64*4;
+@@ -684,7 +684,7 @@ static void qxl_cursor_atomic_update(str
+ cursor_bo, 0);
+ cmd->type = QXL_CURSOR_SET;
+
+- qxl_bo_unref(&qcrtc->cursor_bo);
++ old_cursor_bo = qcrtc->cursor_bo;
+ qcrtc->cursor_bo = cursor_bo;
+ cursor_bo = NULL;
+ } else {
+@@ -704,6 +704,9 @@ static void qxl_cursor_atomic_update(str
+ qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false);
+ qxl_release_fence_buffer_objects(release);
+
++ if (old_cursor_bo)
++ qxl_bo_unref(&old_cursor_bo);
++
+ qxl_bo_unref(&cursor_bo);
+
+ return;
drm-amdgpu-add-apu-support-in-vi_set_uvd_clocks.patch
drm-amdgpu-add-apu-support-in-vi_set_vce_clocks.patch
drm-amdgpu-fix-the-missed-vcn-fw-version-report.patch
+drm-qxl-call-qxl_bo_unref-outside-atomic-context.patch
+drm-atmel-hlcdc-check-stride-values-in-the-first-plane.patch
+drm-amdgpu-use-kvmalloc_array-for-allocating-vram-manager-nodes-array.patch
+drm-amdgpu-refactor-amdgpu_vram_mgr_bo_invisible_size-helper.patch
+drm-amdgpu-make-amdgpu_vram_mgr_bo_invisible_size-always-accurate.patch
+drm-i915-enable-provoking-vertex-fix-on-gen9-systems.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
