drm/amd/display: Reduce accessing remote DPCD overhead

[Why]
Observed frame rate get dropped by tool like glxgear. Even though the
output to monitor is 60Hz, the rendered frame rate drops to 30Hz lower.

It's due to code path in some cases will trigger
dm_dp_mst_is_port_support_mode() to read out remote Link status to
assess the available bandwidth for dsc maniplation. Overhead of keep
reading remote DPCD is considerable.

[How]
Store the remote link BW in mst_local_bw and use end-to-end full_pbn
as an indicator to decide whether update the remote link bw or not.

Whenever we need the info to assess the BW, visit the stored one first.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3720
Fixes: fa57924c76d9 ("drm/amd/display: Refactor function dm_dp_mst_is_port_support_mode()")
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 4a9a918545455a5979c6232fcf61ed3d8f0db3ae)
Cc: stable@vger.kernel.org

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index 6464a8378387c70f062a31ed5a1099c68ebac38b..2227cd8e4a892682ccf60a8253d7852ecab59af6 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -697,6 +697,8 @@ struct amdgpu_dm_connector {
        struct drm_dp_mst_port *mst_output_port;
        struct amdgpu_dm_connector *mst_root;
        struct drm_dp_aux *dsc_aux;
+       uint32_t mst_local_bw;
+       uint16_t vc_full_pbn;
        struct mutex handle_mst_msg_ready;
 
        /* TODO see if we can merge with ddc_bus or make a dm_connector */

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index aadaa61ac5acaada9acefbe763332bc5f5cce496..1080075ccb17c29cf2092c4a449b947fc493f31a 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -155,6 +155,17 @@ amdgpu_dm_mst_connector_late_register(struct drm_connector *connector)
        return 0;
 }
 
+
+static inline void
+amdgpu_dm_mst_reset_mst_connector_setting(struct amdgpu_dm_connector *aconnector)
+{
+       aconnector->drm_edid = NULL;
+       aconnector->dsc_aux = NULL;
+       aconnector->mst_output_port->passthrough_aux = NULL;
+       aconnector->mst_local_bw = 0;
+       aconnector->vc_full_pbn = 0;
+}
+
 static void
 amdgpu_dm_mst_connector_early_unregister(struct drm_connector *connector)
 {
@@ -182,9 +193,7 @@ amdgpu_dm_mst_connector_early_unregister(struct drm_connector *connector)
 
                dc_sink_release(dc_sink);
                aconnector->dc_sink = NULL;
-               aconnector->drm_edid = NULL;
-               aconnector->dsc_aux = NULL;
-               port->passthrough_aux = NULL;
+               amdgpu_dm_mst_reset_mst_connector_setting(aconnector);
        }
 
        aconnector->mst_status = MST_STATUS_DEFAULT;
@@ -504,9 +513,7 @@ dm_dp_mst_detect(struct drm_connector *connector,
 
                dc_sink_release(aconnector->dc_sink);
                aconnector->dc_sink = NULL;
-               aconnector->drm_edid = NULL;
-               aconnector->dsc_aux = NULL;
-               port->passthrough_aux = NULL;
+               amdgpu_dm_mst_reset_mst_connector_setting(aconnector);
 
                amdgpu_dm_set_mst_status(&aconnector->mst_status,
                        MST_REMOTE_EDID | MST_ALLOCATE_NEW_PAYLOAD | MST_CLEAR_ALLOCATED_PAYLOAD,
@@ -1819,9 +1826,18 @@ enum dc_status dm_dp_mst_is_port_support_mode(
                        struct drm_dp_mst_port *immediate_upstream_port = NULL;
                        uint32_t end_link_bw = 0;
 
-                       /*Get last DP link BW capability*/
-                       if (dp_get_link_current_set_bw(&aconnector->mst_output_port->aux, &end_link_bw)) {
-                               if (stream_kbps > end_link_bw) {
+                       /*Get last DP link BW capability. Mode shall be supported by Legacy peer*/
+                       if (aconnector->mst_output_port->pdt != DP_PEER_DEVICE_DP_LEGACY_CONV &&
+                               aconnector->mst_output_port->pdt != DP_PEER_DEVICE_NONE) {
+                               if (aconnector->vc_full_pbn != aconnector->mst_output_port->full_pbn) {
+                                       dp_get_link_current_set_bw(&aconnector->mst_output_port->aux, &end_link_bw);
+                                       aconnector->vc_full_pbn = aconnector->mst_output_port->full_pbn;
+                                       aconnector->mst_local_bw = end_link_bw;
+                               } else {
+                                       end_link_bw = aconnector->mst_local_bw;
+                               }
+
+                               if (end_link_bw > 0 && stream_kbps > end_link_bw) {
                                        DRM_DEBUG_DRIVER("MST_DSC dsc decode at last link."
                                                         "Mode required bw can't fit into last link\n");
                                        return DC_FAIL_BANDWIDTH_VALIDATE;