--- /dev/null
+From 196f954e250943df414efd3d632254c29be38e59 Mon Sep 17 00:00:00 2001
+From: Mario Kleiner <mario.kleiner.de@gmail.com>
+Date: Wed, 6 Jul 2016 12:05:45 +0200
+Subject: drm/i915/dp: Revert "drm/i915/dp: fall back to 18 bpp when sink capability is unknown"
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Mario Kleiner <mario.kleiner.de@gmail.com>
+
+commit 196f954e250943df414efd3d632254c29be38e59 upstream.
+
+This reverts commit 013dd9e03872
+("drm/i915/dp: fall back to 18 bpp when sink capability is unknown")
+
+This commit introduced a regression into stable kernels,
+as it reduces output color depth to 6 bpc for any video
+sink connected to a Displayport connector if that sink
+doesn't report a specific color depth via EDID, or if
+our EDID parser doesn't actually recognize the proper
+bpc from EDID.
+
+Affected are active DisplayPort->VGA converters and
+active DisplayPort->DVI converters. Both should be
+able to handle 8 bpc, but are degraded to 6 bpc with
+this patch.
+
+The reverted commit was meant to fix
+Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=105331
+
+A followup patch implements a fix for that specific bug,
+which is caused by a faulty EDID of the affected DP panel
+by adding a new EDID quirk for that panel.
+
+DP 18 bpp fallback handling and other improvements to
+DP sink bpc detection will be handled for future
+kernels in a separate series of patches.
+
+Please backport to stable.
+
+Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
+Acked-by: Jani Nikula <jani.nikula@intel.com>
+Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_display.c | 20 +++++---------------
+ 1 file changed, 5 insertions(+), 15 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -8841,21 +8841,11 @@ connected_sink_compute_bpp(struct intel_
+ pipe_config->pipe_bpp = connector->base.display_info.bpc*3;
+ }
+
+- /* Clamp bpp to default limit on screens without EDID 1.4 */
+- if (connector->base.display_info.bpc == 0) {
+- int type = connector->base.connector_type;
+- int clamp_bpp = 24;
+-
+- /* Fall back to 18 bpp when DP sink capability is unknown. */
+- if (type == DRM_MODE_CONNECTOR_DisplayPort ||
+- type == DRM_MODE_CONNECTOR_eDP)
+- clamp_bpp = 18;
+-
+- if (bpp > clamp_bpp) {
+- DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of %d\n",
+- bpp, clamp_bpp);
+- pipe_config->pipe_bpp = clamp_bpp;
+- }
++ /* Clamp bpp to 8 on screens without EDID 1.4 */
++ if (connector->base.display_info.bpc == 0 && bpp > 24) {
++ DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of 24\n",
++ bpp);
++ pipe_config->pipe_bpp = 24;
+ }
+ }
+