drm/i915: Drop WA 16015675438

With dynamic load-balancing disabled on the compute side, there's no
reason left to enable WA 16015675438. Drop it from both PVC and DG2.
Note that this can be done because now the driver always set a fixed
partition of EUs during initialization via the ccs_mode configuration.

The flag to GuC is still needed because of 18020744125, so update
the comment accordingly.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
Acked-by: Michal Mrozek <michal.mrozek@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240306144723.1826977-1-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 4dec935cc89fb9d2368805f0fd202b41600675c9..09461a3832dc29f708bb45aa79d44849b70e6c74 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2928,14 +2928,10 @@ general_render_compute_wa_init(struct intel_engine_cs *engine, struct i915_wa_li
                wa_mcr_write_or(wal, LSC_CHICKEN_BIT_0, DISABLE_D8_D16_COASLESCE);
        }
 
-       if (IS_PONTEVECCHIO(i915) || IS_DG2(i915)) {
+       if (IS_PONTEVECCHIO(i915) || IS_DG2(i915))
                /* Wa_14015227452:dg2,pvc */
                wa_mcr_masked_en(wal, GEN9_ROW_CHICKEN4, XEHP_DIS_BBL_SYSPIPE);
 
-               /* Wa_16015675438:dg2,pvc */
-               wa_masked_en(wal, FF_SLICE_CS_CHICKEN2, GEN12_PERF_FIX_BALANCING_CFE_DISABLE);
-       }
-
        if (IS_DG2(i915)) {
                /*
                 * Wa_16011620976:dg2_g11

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 0c67d674c94de35a41ff40cce75937987b614c01..a6440cfe4b9851ce9685338bf668e95a5b64c1e9 100644 (file)
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -320,7 +320,7 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
        if (IS_DG2_G11(gt->i915))
                flags |= GUC_WA_CONTEXT_ISOLATION;
 
-       /* Wa_16015675438 */
+       /* Wa_18020744125 */
        if (!RCS_MASK(gt))
                flags |= GUC_WA_RCS_REGS_IN_CCS_REGS_LIST;