5.15-stable patches

added patches:
	pci-qcom-fix-pipe-clock-imbalance.patch

diff --git a/queue-5.15/pci-qcom-fix-pipe-clock-imbalance.patch b/queue-5.15/pci-qcom-fix-pipe-clock-imbalance.patch
new file mode 100644 (file)
index 0000000..e88167c
--- /dev/null
+++ b/queue-5.15/pci-qcom-fix-pipe-clock-imbalance.patch
@@ -0,0 +1,44 @@
+From fdf6a2f533115ec5d4d9629178f8196331f1ac50 Mon Sep 17 00:00:00 2001
+From: Johan Hovold <johan+linaro@kernel.org>
+Date: Fri, 1 Apr 2022 15:33:51 +0200
+Subject: PCI: qcom: Fix pipe clock imbalance
+
+From: Johan Hovold <johan+linaro@kernel.org>
+
+commit fdf6a2f533115ec5d4d9629178f8196331f1ac50 upstream.
+
+Fix a clock imbalance introduced by ed8cc3b1fc84 ("PCI: qcom: Add support
+for SDM845 PCIe controller"), which enables the pipe clock both in init()
+and in post_init() but only disables in post_deinit().
+
+Note that the pipe clock was also never disabled in the init() error
+paths and that enabling the clock before powering up the PHY looks
+questionable.
+
+Link: https://lore.kernel.org/r/20220401133351.10113-1-johan+linaro@kernel.org
+Fixes: ed8cc3b1fc84 ("PCI: qcom: Add support for SDM845 PCIe controller")
+Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
+Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+Cc: stable@vger.kernel.org      # 5.6
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pci/controller/dwc/pcie-qcom.c |    6 ------
+ 1 file changed, 6 deletions(-)
+
+--- a/drivers/pci/controller/dwc/pcie-qcom.c
++++ b/drivers/pci/controller/dwc/pcie-qcom.c
+@@ -1203,12 +1203,6 @@ static int qcom_pcie_init_2_7_0(struct q
+               goto err_disable_clocks;
+       }
+ 
+-      ret = clk_prepare_enable(res->pipe_clk);
+-      if (ret) {
+-              dev_err(dev, "cannot prepare/enable pipe clock\n");
+-              goto err_disable_clocks;
+-      }
+-
+       /* configure PCIe to RC mode */
+       writel(DEVICE_TYPE_RC, pcie->parf + PCIE20_PARF_DEVICE_TYPE);
+ 

diff --git a/queue-5.15/series b/queue-5.15/series
index a2cedfa1f9d55f3796de098644d10049b1f8352f..32ac00408399a22c246cf03aab7af71a9441331a 100644 (file)
--- a/queue-5.15/series
+++ b/queue-5.15/series
@@ -243,3 +243,4 @@ random-mark-bootloader-randomness-code-as-__init.patch
 random-account-for-arch-randomness-in-bits.patch
 md-raid0-ignore-raid0-layout-if-the-second-zone-has-only-one-device.patch
 net-sched-act_police-more-accurate-mtu-policing.patch
+pci-qcom-fix-pipe-clock-imbalance.patch