]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
ARM: dts: qcom: ipq4019: fix space vs tab indenting inside qcom-ipq4019.dtsi
authorJohn Crispin <john@phrozen.org>
Wed, 25 Jul 2018 08:37:49 +0000 (10:37 +0200)
committerAndy Gross <andy.gross@linaro.org>
Thu, 13 Sep 2018 20:38:04 +0000 (15:38 -0500)
There are various places inside this dtsi file where 8 spaces where used
for indenting instead of tabs.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
arch/arm/boot/dts/qcom-ipq4019.dtsi

index ee6720b7e4d79fd0ce0e991d19c5c0f7389eca7d..2d56008d8d6b53e8a79f9f6265838a22484c5e73 100644 (file)
                        status = "disabled";
                };
 
-                acc0: clock-controller@b088000 {
-                        compatible = "qcom,kpss-acc-v2";
-                        reg = <0x0b088000 0x1000>, <0xb008000 0x1000>;
-                };
-
-                acc1: clock-controller@b098000 {
-                        compatible = "qcom,kpss-acc-v2";
-                        reg = <0x0b098000 0x1000>, <0xb008000 0x1000>;
-                };
-
-                acc2: clock-controller@b0a8000 {
-                        compatible = "qcom,kpss-acc-v2";
-                        reg = <0x0b0a8000 0x1000>, <0xb008000 0x1000>;
-                };
-
-                acc3: clock-controller@b0b8000 {
-                        compatible = "qcom,kpss-acc-v2";
-                        reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>;
-                };
-
-                saw0: regulator@b089000 {
-                        compatible = "qcom,saw2";
+               acc0: clock-controller@b088000 {
+                       compatible = "qcom,kpss-acc-v2";
+                       reg = <0x0b088000 0x1000>, <0xb008000 0x1000>;
+               };
+
+               acc1: clock-controller@b098000 {
+                       compatible = "qcom,kpss-acc-v2";
+                       reg = <0x0b098000 0x1000>, <0xb008000 0x1000>;
+               };
+
+               acc2: clock-controller@b0a8000 {
+                       compatible = "qcom,kpss-acc-v2";
+                       reg = <0x0b0a8000 0x1000>, <0xb008000 0x1000>;
+               };
+
+               acc3: clock-controller@b0b8000 {
+                       compatible = "qcom,kpss-acc-v2";
+                       reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>;
+               };
+
+               saw0: regulator@b089000 {
+                       compatible = "qcom,saw2";
                        reg = <0x0b089000 0x1000>, <0x0b009000 0x1000>;
                         regulator;
-                };
+               };
 
-                saw1: regulator@b099000 {
-                        compatible = "qcom,saw2";
-                        reg = <0x0b099000 0x1000>, <0x0b009000 0x1000>;
-                        regulator;
-                };
+               saw1: regulator@b099000 {
+                       compatible = "qcom,saw2";
+                       reg = <0x0b099000 0x1000>, <0x0b009000 0x1000>;
+                       regulator;
+               };
 
-                saw2: regulator@b0a9000 {
-                        compatible = "qcom,saw2";
-                        reg = <0x0b0a9000 0x1000>, <0x0b009000 0x1000>;
-                        regulator;
-                };
+               saw2: regulator@b0a9000 {
+                       compatible = "qcom,saw2";
+                       reg = <0x0b0a9000 0x1000>, <0x0b009000 0x1000>;
+                       regulator;
+               };
 
-                saw3: regulator@b0b9000 {
-                        compatible = "qcom,saw2";
-                        reg = <0x0b0b9000 0x1000>, <0x0b009000 0x1000>;
-                        regulator;
-                };
+               saw3: regulator@b0b9000 {
+                       compatible = "qcom,saw2";
+                       reg = <0x0b0b9000 0x1000>, <0x0b009000 0x1000>;
+                       regulator;
+               };
 
                blsp1_uart1: serial@78af000 {
                        compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";