]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/i915/guc: Enable PXP GuC autoteardown flow
authorJuston Li <juston.li@intel.com>
Fri, 6 Sep 2024 17:40:38 +0000 (10:40 -0700)
committerJohn Harrison <John.C.Harrison@Intel.com>
Mon, 14 Oct 2024 20:06:45 +0000 (13:06 -0700)
This feature flag enables GuC autoteardown which allows for a grace
period before session teardown.

Also add a HAS_PXP() helper to share with the other place that wants
to check.

Signed-off-by: Juston Li <juston.li@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240906174038.1468026-1-John.C.Harrison@Intel.com
drivers/gpu/drm/i915/gt/uc/intel_guc.c
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/pxp/intel_pxp.c

index 097fc6bd1285e40211b9b59c1d020671e68037d6..5949ff0b0161ffda08058daddaf202c1c0941103 100644 (file)
@@ -239,8 +239,16 @@ static u32 guc_ctl_debug_flags(struct intel_guc *guc)
 
 static u32 guc_ctl_feature_flags(struct intel_guc *guc)
 {
+       struct intel_gt *gt = guc_to_gt(guc);
        u32 flags = 0;
 
+       /*
+        * Enable PXP GuC autoteardown flow.
+        * NB: MTL does things differently.
+        */
+       if (HAS_PXP(gt->i915) && !IS_METEORLAKE(gt->i915))
+               flags |= GUC_CTL_ENABLE_GUC_PXP_CTL;
+
        if (!intel_guc_submission_is_used(guc))
                flags |= GUC_CTL_DISABLE_SCHEDULER;
 
index 263c9c3f6a0347c26105613d0aa6a267bf28e931..4ce6e2332a63fc59bab8122e30fd1ff52c0fc8c4 100644 (file)
 #define   GUC_WA_ENABLE_TSC_CHECK_ON_RC6       BIT(22)
 
 #define GUC_CTL_FEATURE                        2
+#define   GUC_CTL_ENABLE_GUC_PXP_CTL   BIT(1)
 #define   GUC_CTL_ENABLE_SLPC          BIT(2)
 #define   GUC_CTL_DISABLE_SCHEDULER    BIT(14)
 
index 5cae1fe42c2ac9ff7960944986e2c375b01e8fe6..60dc2182f4859ecff89ed939dd5da7008119e307 100644 (file)
@@ -691,6 +691,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_RPS(i915)  (INTEL_INFO(i915)->has_rps)
 
+#define HAS_PXP(i915) \
+       (IS_ENABLED(CONFIG_DRM_I915_PXP) && INTEL_INFO(i915)->has_pxp)
+
 #define HAS_HECI_PXP(i915) \
        (INTEL_INFO(i915)->has_heci_pxp)
 
index 75278e78ca90e68d6cbb7b4b72e2ab927529a029..5e0bf776aac0f8b0e9e9f7db9d3b3090db4ab3e1 100644 (file)
@@ -170,7 +170,7 @@ static struct intel_gt *find_gt_for_required_teelink(struct drm_i915_private *i9
 
 static struct intel_gt *find_gt_for_required_protected_content(struct drm_i915_private *i915)
 {
-       if (!IS_ENABLED(CONFIG_DRM_I915_PXP) || !INTEL_INFO(i915)->has_pxp)
+       if (!HAS_PXP(i915))
                return NULL;
 
        /*