]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: qcom: msm8976: Use the header with DSI phy clock IDs
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tue, 8 Apr 2025 09:32:04 +0000 (11:32 +0200)
committerBjorn Andersson <andersson@kernel.org>
Tue, 8 Apr 2025 21:56:15 +0000 (16:56 -0500)
Use the header with DSI phy clock IDs to make code more readable.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-7-73b482a6dd02@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/msm8976.dtsi

index d036f31dfdca162debe18ed6ed9a7767a34aced6..e2ac2fd6882fcf47e846a92d45e0fcb9beba633a 100644 (file)
@@ -6,6 +6,7 @@
  * Copyright (c) 2022, Marijn Suijten <marijn.suijten@somainline.org>
  */
 
+#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 #include <dt-bindings/clock/qcom,gcc-msm8976.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
 #include <dt-bindings/gpio/gpio.h>
 
                        clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
                                 <&rpmcc RPM_SMD_XO_A_CLK_SRC>,
-                                <&mdss_dsi0_phy 1>,
-                                <&mdss_dsi0_phy 0>,
-                                <&mdss_dsi1_phy 1>,
-                                <&mdss_dsi1_phy 0>;
+                                <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
+                                <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+                                <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>,
+                                <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>;
                        clock-names = "xo",
                                      "xo_a",
                                      "dsi0pll",
 
                                assigned-clocks = <&gcc GCC_MDSS_BYTE0_CLK_SRC>,
                                                  <&gcc GCC_MDSS_PCLK0_CLK_SRC>;
-                               assigned-clock-parents = <&mdss_dsi0_phy 0>,
-                                                        <&mdss_dsi0_phy 1>;
+                               assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+                                                        <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
 
                                phys = <&mdss_dsi0_phy>;
 
 
                                assigned-clocks = <&gcc GCC_MDSS_BYTE1_CLK_SRC>,
                                                  <&gcc GCC_MDSS_PCLK1_CLK_SRC>;
-                               assigned-clock-parents = <&mdss_dsi1_phy 0>,
-                                                        <&mdss_dsi1_phy 1>;
+                               assigned-clock-parents = <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
+                                                        <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>;
 
                                phys = <&mdss_dsi1_phy>;