4.4-stable patches

added patches:
	arm64-cpufeature-track-32bit-el0-support.patch
	arm64-kvm-sanitize-pstate.m-when-being-set-from-userspace.patch

diff --git a/queue-4.4/arm64-cpufeature-track-32bit-el0-support.patch b/queue-4.4/arm64-cpufeature-track-32bit-el0-support.patch
new file mode 100644 (file)
index 0000000..0baaa18
--- /dev/null
+++ b/queue-4.4/arm64-cpufeature-track-32bit-el0-support.patch
@@ -0,0 +1,74 @@
+From 042446a31e3803d81c7e618dd80928dc3dce70c5 Mon Sep 17 00:00:00 2001
+From: Suzuki K Poulose <suzuki.poulose@arm.com>
+Date: Mon, 18 Apr 2016 10:28:36 +0100
+Subject: arm64: cpufeature: Track 32bit EL0 support
+
+From: Suzuki K Poulose <suzuki.poulose@arm.com>
+
+commit 042446a31e3803d81c7e618dd80928dc3dce70c5 upstream.
+
+Add cpu_hwcap bit for keeping track of the support for 32bit EL0.
+
+Tested-by: Yury Norov <ynorov@caviumnetworks.com>
+Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/include/asm/cpufeature.h |    8 +++++++-
+ arch/arm64/include/asm/sysreg.h     |    1 +
+ arch/arm64/kernel/cpufeature.c      |    8 ++++++++
+ 3 files changed, 16 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/include/asm/cpufeature.h
++++ b/arch/arm64/include/asm/cpufeature.h
+@@ -31,8 +31,9 @@
+ #define ARM64_WORKAROUND_CAVIUM_23154         6
+ #define ARM64_WORKAROUND_834220                       7
+ #define ARM64_WORKAROUND_CAVIUM_27456         8
++#define ARM64_HAS_32BIT_EL0                   9
+ 
+-#define ARM64_NCAPS                           9
++#define ARM64_NCAPS                           10
+ 
+ #ifndef __ASSEMBLY__
+ 
+@@ -180,6 +181,11 @@ static inline bool cpu_supports_mixed_en
+       return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1));
+ }
+ 
++static inline bool system_supports_32bit_el0(void)
++{
++      return cpus_have_cap(ARM64_HAS_32BIT_EL0);
++}
++
+ static inline bool system_supports_mixed_endian_el0(void)
+ {
+       return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1));
+--- a/arch/arm64/include/asm/sysreg.h
++++ b/arch/arm64/include/asm/sysreg.h
+@@ -109,6 +109,7 @@
+ #define ID_AA64PFR0_ASIMD_SUPPORTED   0x0
+ #define ID_AA64PFR0_EL1_64BIT_ONLY    0x1
+ #define ID_AA64PFR0_EL0_64BIT_ONLY    0x1
++#define ID_AA64PFR0_EL0_32BIT_64BIT   0x2
+ 
+ /* id_aa64mmfr0 */
+ #define ID_AA64MMFR0_TGRAN4_SHIFT     28
+--- a/arch/arm64/kernel/cpufeature.c
++++ b/arch/arm64/kernel/cpufeature.c
+@@ -653,6 +653,14 @@ static const struct arm64_cpu_capabiliti
+               .min_field_value = 2,
+       },
+ #endif /* CONFIG_AS_LSE && CONFIG_ARM64_LSE_ATOMICS */
++      {
++              .desc = "32-bit EL0 Support",
++              .capability = ARM64_HAS_32BIT_EL0,
++              .matches = has_cpuid_feature,
++              .sys_reg = SYS_ID_AA64PFR0_EL1,
++              .field_pos = ID_AA64PFR0_EL0_SHIFT,
++              .min_field_value = ID_AA64PFR0_EL0_32BIT_64BIT,
++      },
+       {},
+ };
+ 

diff --git a/queue-4.4/arm64-kvm-sanitize-pstate.m-when-being-set-from-userspace.patch b/queue-4.4/arm64-kvm-sanitize-pstate.m-when-being-set-from-userspace.patch
new file mode 100644 (file)
index 0000000..3d7a6af
--- /dev/null
+++ b/queue-4.4/arm64-kvm-sanitize-pstate.m-when-being-set-from-userspace.patch
@@ -0,0 +1,71 @@
+From 2a3f93459d689d990b3ecfbe782fec89b97d3279 Mon Sep 17 00:00:00 2001
+From: Marc Zyngier <marc.zyngier@arm.com>
+Date: Thu, 27 Sep 2018 16:53:22 +0100
+Subject: arm64: KVM: Sanitize PSTATE.M when being set from userspace
+
+From: Marc Zyngier <marc.zyngier@arm.com>
+
+commit 2a3f93459d689d990b3ecfbe782fec89b97d3279 upstream.
+
+Not all execution modes are valid for a guest, and some of them
+depend on what the HW actually supports. Let's verify that what
+userspace provides is compatible with both the VM settings and
+the HW capabilities.
+
+Cc: <stable@vger.kernel.org>
+Fixes: 0d854a60b1d7 ("arm64: KVM: enable initialization of a 32bit vcpu")
+Reviewed-by: Christoffer Dall <christoffer.dall@arm.com>
+Reviewed-by: Mark Rutland <mark.rutland@arm.com>
+Reviewed-by: Dave Martin <Dave.Martin@arm.com>
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/include/asm/kvm_emulate.h |    5 +++++
+ arch/arm64/kvm/guest.c               |   10 +++++++++-
+ 2 files changed, 14 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/include/asm/kvm_emulate.h
++++ b/arch/arm64/include/asm/kvm_emulate.h
+@@ -41,6 +41,11 @@ void kvm_inject_undefined(struct kvm_vcp
+ void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr);
+ void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr);
+ 
++static inline bool vcpu_el1_is_32bit(struct kvm_vcpu *vcpu)
++{
++      return !(vcpu->arch.hcr_el2 & HCR_RW);
++}
++
+ static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu)
+ {
+       vcpu->arch.hcr_el2 = HCR_GUEST_FLAGS;
+--- a/arch/arm64/kvm/guest.c
++++ b/arch/arm64/kvm/guest.c
+@@ -143,17 +143,25 @@ static int set_core_reg(struct kvm_vcpu
+       }
+ 
+       if (off == KVM_REG_ARM_CORE_REG(regs.pstate)) {
+-              u32 mode = (*(u32 *)valp) & COMPAT_PSR_MODE_MASK;
++              u64 mode = (*(u64 *)valp) & COMPAT_PSR_MODE_MASK;
+               switch (mode) {
+               case COMPAT_PSR_MODE_USR:
++                      if (!system_supports_32bit_el0())
++                              return -EINVAL;
++                      break;
+               case COMPAT_PSR_MODE_FIQ:
+               case COMPAT_PSR_MODE_IRQ:
+               case COMPAT_PSR_MODE_SVC:
+               case COMPAT_PSR_MODE_ABT:
+               case COMPAT_PSR_MODE_UND:
++                      if (!vcpu_el1_is_32bit(vcpu))
++                              return -EINVAL;
++                      break;
+               case PSR_MODE_EL0t:
+               case PSR_MODE_EL1t:
+               case PSR_MODE_EL1h:
++                      if (vcpu_el1_is_32bit(vcpu))
++                              return -EINVAL;
+                       break;
+               default:
+                       err = -EINVAL;

diff --git a/queue-4.4/series b/queue-4.4/series
index 8ab3095b9134220ba254a12c03a3458b4a06b982..0451903519fd3c5dc42b6a19d4923f7c60df1adf 100644 (file)
--- a/queue-4.4/series
+++ b/queue-4.4/series
@@ -68,3 +68,5 @@ e1000-ensure-to-free-old-tx-rx-rings-in-set_ringparam.patch
 hwmon-ina2xx-fix-sysfs-shunt-resistor-read-access.patch
 hwmon-adt7475-make-adt7475_read_word-return-errors.patch
 i2c-i801-allow-acpi-aml-access-i-o-ports-not-reserved-for-smbus.patch
+arm64-cpufeature-track-32bit-el0-support.patch
+arm64-kvm-sanitize-pstate.m-when-being-set-from-userspace.patch