]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
iommu/amd: Rename ats related variables
authorVasant Hegde <vasant.hegde@amd.com>
Thu, 21 Sep 2023 09:21:43 +0000 (09:21 +0000)
committerJoerg Roedel <jroedel@suse.de>
Mon, 25 Sep 2023 10:39:05 +0000 (12:39 +0200)
Remove nested structure and make it as 'ats_{enable/qdep}'.
Also convert 'dev_data.pri_tlp' to bit field.

No functional changes intended.

Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com>
Link: https://lore.kernel.org/r/20230921092147.5930-11-vasant.hegde@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
drivers/iommu/amd/amd_iommu_types.h
drivers/iommu/amd/iommu.c

index 29e76c1e9f9e379220e195d2da55549c06ab99bc..1c61dca638242d5e2e13dff78d5168bef896a1df 100644 (file)
@@ -812,11 +812,9 @@ struct iommu_dev_data {
        struct device *dev;
        u16 devid;                        /* PCI Device ID */
        bool iommu_v2;                    /* Device can make use of IOMMUv2 */
-       struct {
-               bool enabled;
-               int qdep;
-       } ats;                            /* ATS state */
-       bool pri_tlp;                     /* PASID TLB required for
+       int ats_qdep;
+       u8 ats_enabled  :1;               /* ATS state */
+       u8 pri_tlp      :1;               /* PASID TLB required for
                                             PPR completions */
        bool use_vapic;                   /* Enable device to use vapic mode */
        bool defer_attach;
index 126f58784829e7a7417d0a8962c42602c423b600..4330002769230b69d22b2bac03c2f555636a133d 100644 (file)
@@ -1091,7 +1091,7 @@ static void build_inv_iotlb_pasid(struct iommu_cmd *cmd, u16 devid, u32 pasid,
 }
 
 static void build_complete_ppr(struct iommu_cmd *cmd, u16 devid, u32 pasid,
-                              int status, int tag, bool gn)
+                              int status, int tag, u8 gn)
 {
        memset(cmd, 0, sizeof(*cmd));
 
@@ -1314,7 +1314,7 @@ static int device_flush_iotlb(struct iommu_dev_data *dev_data,
        struct iommu_cmd cmd;
        int qdep;
 
-       qdep     = dev_data->ats.qdep;
+       qdep     = dev_data->ats_qdep;
        iommu    = rlookup_amd_iommu(dev_data->dev);
        if (!iommu)
                return -EINVAL;
@@ -1365,7 +1365,7 @@ static int device_flush_dte(struct iommu_dev_data *dev_data)
                        return ret;
        }
 
-       if (dev_data->ats.enabled)
+       if (dev_data->ats_enabled)
                ret = device_flush_iotlb(dev_data, 0, ~0UL);
 
        return ret;
@@ -1398,7 +1398,7 @@ static void __domain_flush_pages(struct protection_domain *domain,
 
        list_for_each_entry(dev_data, &domain->dev_list, list) {
 
-               if (!dev_data->ats.enabled)
+               if (!dev_data->ats_enabled)
                        continue;
 
                ret |= device_flush_iotlb(dev_data, address, size);
@@ -1718,7 +1718,7 @@ static void do_attach(struct iommu_dev_data *dev_data,
        iommu = rlookup_amd_iommu(dev_data->dev);
        if (!iommu)
                return;
-       ats   = dev_data->ats.enabled;
+       ats   = dev_data->ats_enabled;
 
        /* Update data structures */
        dev_data->domain = domain;
@@ -1856,14 +1856,14 @@ static int attach_device(struct device *dev,
                        if (pdev_pri_ats_enable(pdev) != 0)
                                goto out;
 
-                       dev_data->ats.enabled = true;
-                       dev_data->ats.qdep    = pci_ats_queue_depth(pdev);
+                       dev_data->ats_enabled = 1;
+                       dev_data->ats_qdep    = pci_ats_queue_depth(pdev);
                        dev_data->pri_tlp     = pci_prg_resp_pasid_required(pdev);
                }
        } else if (amd_iommu_iotlb_sup &&
                   pci_enable_ats(pdev, PAGE_SHIFT) == 0) {
-               dev_data->ats.enabled = true;
-               dev_data->ats.qdep    = pci_ats_queue_depth(pdev);
+               dev_data->ats_enabled = 1;
+               dev_data->ats_qdep    = pci_ats_queue_depth(pdev);
        }
 
 skip_ats_check:
@@ -1920,10 +1920,10 @@ static void detach_device(struct device *dev)
 
        if (domain->flags & PD_IOMMUV2_MASK && dev_data->iommu_v2)
                pdev_iommuv2_disable(to_pci_dev(dev));
-       else if (dev_data->ats.enabled)
+       else if (dev_data->ats_enabled)
                pci_disable_ats(to_pci_dev(dev));
 
-       dev_data->ats.enabled = false;
+       dev_data->ats_enabled = 0;
 
 out:
        spin_unlock(&dev_data->lock);
@@ -2013,7 +2013,7 @@ static void update_device_table(struct protection_domain *domain)
                if (!iommu)
                        continue;
                set_dte_entry(iommu, dev_data->devid, domain,
-                             dev_data->ats.enabled, dev_data->iommu_v2);
+                             dev_data->ats_enabled, dev_data->iommu_v2);
                clone_aliases(iommu, dev_data->dev);
        }
 }
@@ -2612,10 +2612,10 @@ static int __flush_pasid(struct protection_domain *domain, u32 pasid,
                   There might be non-IOMMUv2 capable devices in an IOMMUv2
                 * domain.
                 */
-               if (!dev_data->ats.enabled)
+               if (!dev_data->ats_enabled)
                        continue;
 
-               qdep  = dev_data->ats.qdep;
+               qdep  = dev_data->ats_qdep;
                iommu = rlookup_amd_iommu(dev_data->dev);
                if (!iommu)
                        continue;