re PR target/19427 (gcc.c-torture/execute/simd-1.c compilation fails for i686 with...

        PR target/19427
        * config/i386/i386.c (ix86_expand_vector_set): Fix third and fourth
        shufps elements.
        (ix86_expand_vector_extract): Likewise.

From-SVN: r93946

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e3d1f0d82e27745cfec45cab9d9c69f32e0893d1..ca86ebb3622951d53b52eff2bf2d0dd4a43c5c7a 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2005-01-19  Richard Henderson  <rth@redhat.com>
+
+       PR target/19427
+       * config/i386/i386.c (ix86_expand_vector_set): Fix third and fourth
+       shufps elements.
+       (ix86_expand_vector_extract): Likewise.
+
 2005-01-19  Richard Henderson  <rth@redhat.com>
 
        PR middle-end/19304

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index cc3cf4b1657f0f921f83bbbb4b3533cb298756fb..800cd5264cf9b9926f978a6e8fc39d8dd44a3d82 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -16269,7 +16269,7 @@ ix86_expand_vector_set (bool mmx_ok, rtx target, rtx val, int elt)
          /* op0 = A B X D  */
          emit_insn (gen_sse_shufps_1 (target, target, tmp,
                                       GEN_INT (1), GEN_INT (0),
-                                      GEN_INT (2), GEN_INT (3)));
+                                      GEN_INT (2+4), GEN_INT (3+4)));
          return;
 
        case 2:
@@ -16277,7 +16277,7 @@ ix86_expand_vector_set (bool mmx_ok, rtx target, rtx val, int elt)
          ix86_expand_vector_set (false, target, val, 0);
          emit_insn (gen_sse_shufps_1 (target, target, tmp,
                                       GEN_INT (0), GEN_INT (1),
-                                      GEN_INT (0), GEN_INT (3)));
+                                      GEN_INT (0+4), GEN_INT (3+4)));
          return;
 
        case 3:
@@ -16285,7 +16285,7 @@ ix86_expand_vector_set (bool mmx_ok, rtx target, rtx val, int elt)
          ix86_expand_vector_set (false, target, val, 0);
          emit_insn (gen_sse_shufps_1 (target, target, tmp,
                                       GEN_INT (0), GEN_INT (1),
-                                      GEN_INT (2), GEN_INT (0)));
+                                      GEN_INT (2+4), GEN_INT (0+4)));
          return;
 
        default:
@@ -16395,7 +16395,7 @@ ix86_expand_vector_extract (bool mmx_ok, rtx target, rtx vec, int elt)
          tmp = gen_reg_rtx (mode);
          emit_insn (gen_sse_shufps_1 (tmp, vec, vec,
                                       GEN_INT (elt), GEN_INT (elt),
-                                      GEN_INT (elt), GEN_INT (elt)));
+                                      GEN_INT (elt+4), GEN_INT (elt+4)));
          break;
 
        case 2: