opcodes:

	* cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to
	CGEN_INSN_RELAXED.
	* fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate.
	* frv-asm.c,frv-desc.c,frv-desc.h: Regenerate.
	* ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate.
	* iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate.
	* m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate.
	* openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate.
	* xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate.
gas:
	* cgen.c (gas_cgen_finish_insn): CGEN_INSN_RELAX renamed to
	CGEN_INSN_RELAXED.
	* config/tc-fr30.c (md_estimate_size_before_relax): Ditto.
	* config/tc-m32r.c (md_estimate_size_before_relax): Ditto.
	* config/tc-openrisc.c (md_estimate_size_before_relax): Ditto.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 84659d078d4e32a7b2528f6a5f790f1dbe0da5d0..c8b13afc7a9970a3cc95059607067a5cd90cced8 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,11 @@
+2003-06-10  Doug Evans  <dje@sebabeach.org>
+
+       * cgen.c (gas_cgen_finish_insn): CGEN_INSN_RELAX renamed to
+       CGEN_INSN_RELAXED.
+       * config/tc-fr30.c (md_estimate_size_before_relax): Ditto.
+       * config/tc-m32r.c (md_estimate_size_before_relax): Ditto.
+       * config/tc-openrisc.c (md_estimate_size_before_relax): Ditto.
+
 2003-06-10  Alan Modra  <amodra@bigpond.net.au>
            Gary Hade <garyhade@us.ibm.com>
 

diff --git a/gas/cgen.c b/gas/cgen.c
index e0740f5795259bd781f87df954568626f34fe2c5..9f2997ed889a4d5af4d8adf8e886d0b501321f55 100644 (file)
--- a/gas/cgen.c
+++ b/gas/cgen.c
@@ -431,7 +431,7 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result)
      Relaxable instructions: We need to ensure we allocate enough
      space for the largest insn.  */
 
-  if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX))
+  if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED))
     /* These currently shouldn't get here.  */
     abort ();
 
@@ -531,7 +531,7 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result)
        cgen_operand_lookup_by_num (gas_cgen_cpu_desc, fixups[i].opindex);
 
       /* Don't create fixups for these.  That's done during relaxation.
-        We don't need to test for CGEN_INSN_RELAX as they can't get here
+        We don't need to test for CGEN_INSN_RELAXED as they can't get here
         (see above).  */
       if (relax_p
          && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXABLE)

diff --git a/gas/config/tc-fr30.c b/gas/config/tc-fr30.c
index f406107976b88ee5b6bd21506ab67160daa803c6..b47903e4486a18dba717fb88e520c5f18d453622 100644 (file)
--- a/gas/config/tc-fr30.c
+++ b/gas/config/tc-fr30.c
@@ -312,7 +312,7 @@ md_estimate_size_before_relax (fragP, segment)
            if ((strcmp (CGEN_INSN_MNEMONIC (insn),
                         CGEN_INSN_MNEMONIC (fragP->fr_cgen.insn))
                 == 0)
-               && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX))
+               && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED))
              break;
          }
        if (i == 4)

diff --git a/gas/config/tc-m32r.c b/gas/config/tc-m32r.c
index d185d2591412aa0b06b1865c8652d0e005785431..f601504f8af737c4a6990d28e44c00188c84e5ea 100644 (file)
--- a/gas/config/tc-m32r.c
+++ b/gas/config/tc-m32r.c
@@ -1507,7 +1507,7 @@ md_estimate_size_before_relax (fragP, segment)
            if ((strcmp (CGEN_INSN_MNEMONIC (insn),
                         CGEN_INSN_MNEMONIC (fragP->fr_cgen.insn))
                 == 0)
-               && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX))
+               && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED))
              break;
          }
        if (i == 4)

diff --git a/gas/config/tc-openrisc.c b/gas/config/tc-openrisc.c
index 091ef27ccc297f56d0c54cc7fda31076c5359555..9b97958248fdec2ffb4365727ac8d7e27f02b7a3 100644 (file)
--- a/gas/config/tc-openrisc.c
+++ b/gas/config/tc-openrisc.c
@@ -304,7 +304,7 @@ md_estimate_size_before_relax (fragP, segment)
            if ((strcmp (CGEN_INSN_MNEMONIC (insn),
                         CGEN_INSN_MNEMONIC (fragP->fr_cgen.insn))
                 == 0)
-               && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX))
+               && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED))
              break;
          }
        if (i == 4)

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 4ca1d76f70a6fcaa10b5d2779fa951b0a6f1ce4b..22e270394e08309d94585d8857c7a0140780bd65 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,15 @@
+2003-06-10  Doug Evans  <dje@sebabeach.org>
+
+       * cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to
+       CGEN_INSN_RELAXED.
+       * fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate.
+       * frv-asm.c,frv-desc.c,frv-desc.h: Regenerate.
+       * ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate.
+       * iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate.
+       * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate.
+       * openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate.
+       * xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate.
+
 2003-06-10  Gary Hade <garyhade@us.ibm.com>
            Alan Modra  <amodra@bigpond.net.au>
 

diff --git a/opcodes/cgen-asm.in b/opcodes/cgen-asm.in
index 525177c79d0937df1d261b51b9bc9db48c30d14a..1ea076809b9858bbd061ca1fa88335becdf2872f 100644 (file)
--- a/opcodes/cgen-asm.in
+++ b/opcodes/cgen-asm.in
@@ -361,10 +361,10 @@ const CGEN_INSN *
       if (! @arch@_cgen_insn_supported (cd, insn))
        continue;
 #endif
-      /* If the RELAX attribute is set, this is an insn that shouldn't be
+      /* If the RELAXED attribute is set, this is an insn that shouldn't be
         chosen immediately.  Instead, it is used during assembler/linker
         relaxation if possible.  */
-      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
+      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
        continue;
 
       str = start;

diff --git a/opcodes/fr30-asm.c b/opcodes/fr30-asm.c
index be9c36c947c2eca4c88e79490a47fbb21ed2dc0d..8e7c7b80975b5c2b6811d5feaae9d9b995b9836b 100644 (file)
--- a/opcodes/fr30-asm.c
+++ b/opcodes/fr30-asm.c
@@ -657,10 +657,10 @@ fr30_cgen_assemble_insn (cd, str, fields, buf, errmsg)
       if (! fr30_cgen_insn_supported (cd, insn))
        continue;
 #endif
-      /* If the RELAX attribute is set, this is an insn that shouldn't be
+      /* If the RELAXED attribute is set, this is an insn that shouldn't be
         chosen immediately.  Instead, it is used during assembler/linker
         relaxation if possible.  */
-      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
+      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
        continue;
 
       str = start;

diff --git a/opcodes/fr30-desc.c b/opcodes/fr30-desc.c
index 01d896f28ea27aa21d0cc53c2a71b75d4befbae1..3309d54cf03ca3f2b9eea85d90ecc8310027a7bd 100644 (file)
--- a/opcodes/fr30-desc.c
+++ b/opcodes/fr30-desc.c
@@ -105,7 +105,7 @@ const CGEN_ATTR_TABLE fr30_cgen_insn_attr_table[] =
   { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
   { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
   { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
-  { "RELAX", &bool_attr[0], &bool_attr[0] },
+  { "RELAXED", &bool_attr[0], &bool_attr[0] },
   { "NO-DIS", &bool_attr[0], &bool_attr[0] },
   { "PBB", &bool_attr[0], &bool_attr[0] },
   { "NOT-IN-DELAY-SLOT", &bool_attr[0], &bool_attr[0] },

diff --git a/opcodes/fr30-desc.h b/opcodes/fr30-desc.h
index 6be96d933abb7e41a635fcd721de4e9933e00d67..35d0de70820e84d296a48680b078a72dc93e8667 100644 (file)
--- a/opcodes/fr30-desc.h
+++ b/opcodes/fr30-desc.h
@@ -240,7 +240,7 @@ typedef enum cgen_operand_type {
 /* Enum declaration for cgen_insn attrs.  */
 typedef enum cgen_insn_attr {
   CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
- , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX
+ , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
  , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_NOT_IN_DELAY_SLOT, CGEN_INSN_END_BOOLS
  , CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_END_NBOOLS
 } CGEN_INSN_ATTR;

diff --git a/opcodes/frv-asm.c b/opcodes/frv-asm.c
index b4647b1ed4dcb46ec7189808be078ed9d5f259ca..0e3d8ddf6691e47d479634992b13f62e98166eef 100644 (file)
--- a/opcodes/frv-asm.c
+++ b/opcodes/frv-asm.c
@@ -960,10 +960,10 @@ frv_cgen_assemble_insn (cd, str, fields, buf, errmsg)
       if (! frv_cgen_insn_supported (cd, insn))
        continue;
 #endif
-      /* If the RELAX attribute is set, this is an insn that shouldn't be
+      /* If the RELAXED attribute is set, this is an insn that shouldn't be
         chosen immediately.  Instead, it is used during assembler/linker
         relaxation if possible.  */
-      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
+      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
        continue;
 
       str = start;

diff --git a/opcodes/frv-desc.c b/opcodes/frv-desc.c
index ffb0b27e3b9ffe790bbfbf16839a0401b22b87fc..97d49b3077b587446c727f1e55c7ca71924b10b4 100644 (file)
--- a/opcodes/frv-desc.c
+++ b/opcodes/frv-desc.c
@@ -188,7 +188,7 @@ const CGEN_ATTR_TABLE frv_cgen_insn_attr_table[] =
   { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
   { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
   { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
-  { "RELAX", &bool_attr[0], &bool_attr[0] },
+  { "RELAXED", &bool_attr[0], &bool_attr[0] },
   { "NO-DIS", &bool_attr[0], &bool_attr[0] },
   { "PBB", &bool_attr[0], &bool_attr[0] },
   { "PRIVILEGED", &bool_attr[0], &bool_attr[0] },

diff --git a/opcodes/frv-desc.h b/opcodes/frv-desc.h
index 3ecf0913aa155fc414c13a2c408428b48461294f..a169e7a6092c3856d687087454abcc00e48cd41f 100644 (file)
--- a/opcodes/frv-desc.h
+++ b/opcodes/frv-desc.h
@@ -696,7 +696,7 @@ typedef enum cgen_operand_type {
 /* Enum declaration for cgen_insn attrs.  */
 typedef enum cgen_insn_attr {
   CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
- , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX
+ , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
  , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_PRIVILEGED, CGEN_INSN_NON_EXCEPTING
  , CGEN_INSN_CONDITIONAL, CGEN_INSN_FR_ACCESS, CGEN_INSN_PRESERVE_OVF, CGEN_INSN_END_BOOLS
  , CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_UNIT, CGEN_INSN_FR400_MAJOR

diff --git a/opcodes/ip2k-asm.c b/opcodes/ip2k-asm.c
index 6a1653b014b120f20156b676f2b6b7b299a87e38..524f256a53778127cc2043169c76ff85bb8d547b 100644 (file)
--- a/opcodes/ip2k-asm.c
+++ b/opcodes/ip2k-asm.c
@@ -908,10 +908,10 @@ ip2k_cgen_assemble_insn (cd, str, fields, buf, errmsg)
       if (! ip2k_cgen_insn_supported (cd, insn))
        continue;
 #endif
-      /* If the RELAX attribute is set, this is an insn that shouldn't be
+      /* If the RELAXED attribute is set, this is an insn that shouldn't be
         chosen immediately.  Instead, it is used during assembler/linker
         relaxation if possible.  */
-      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
+      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
        continue;
 
       str = start;

diff --git a/opcodes/ip2k-desc.c b/opcodes/ip2k-desc.c
index f8e493289fb82552e89f40e25ab09c4efb3694b0..0ab2cc5fa44c7ad2538c7c2a0a32af4d6e07a88f 100644 (file)
--- a/opcodes/ip2k-desc.c
+++ b/opcodes/ip2k-desc.c
@@ -105,7 +105,7 @@ const CGEN_ATTR_TABLE ip2k_cgen_insn_attr_table[] =
   { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
   { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
   { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
-  { "RELAX", &bool_attr[0], &bool_attr[0] },
+  { "RELAXED", &bool_attr[0], &bool_attr[0] },
   { "NO-DIS", &bool_attr[0], &bool_attr[0] },
   { "PBB", &bool_attr[0], &bool_attr[0] },
   { "EXT-SKIP-INSN", &bool_attr[0], &bool_attr[0] },

diff --git a/opcodes/ip2k-desc.h b/opcodes/ip2k-desc.h
index 84db7fb1cb0f3032dd69655a98a92f702490ae56..11220263b5c7e53d5b4794ae3d26e7d06676dcb3 100644 (file)
--- a/opcodes/ip2k-desc.h
+++ b/opcodes/ip2k-desc.h
@@ -225,7 +225,7 @@ typedef enum cgen_operand_type {
 /* Enum declaration for cgen_insn attrs.  */
 typedef enum cgen_insn_attr {
   CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
- , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX
+ , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
  , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_EXT_SKIP_INSN, CGEN_INSN_SKIPA
  , CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_END_NBOOLS
 } CGEN_INSN_ATTR;

diff --git a/opcodes/iq2000-asm.c b/opcodes/iq2000-asm.c
index bb61af0c3d02d84470824e0bce2a707637c79c49..7fb795eb155aff0a5375c167bd523abf24d687ec 100644 (file)
--- a/opcodes/iq2000-asm.c
+++ b/opcodes/iq2000-asm.c
@@ -794,10 +794,10 @@ iq2000_cgen_assemble_insn (cd, str, fields, buf, errmsg)
       if (! iq2000_cgen_insn_supported (cd, insn))
        continue;
 #endif
-      /* If the RELAX attribute is set, this is an insn that shouldn't be
+      /* If the RELAXED attribute is set, this is an insn that shouldn't be
         chosen immediately.  Instead, it is used during assembler/linker
         relaxation if possible.  */
-      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
+      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
        continue;
 
       str = start;

diff --git a/opcodes/iq2000-desc.c b/opcodes/iq2000-desc.c
index 402f7268d1f55fbaa02857537047e3206278abdf..6c7f3b06b799a7a3123a4cb905a7b572ceea719f 100644 (file)
--- a/opcodes/iq2000-desc.c
+++ b/opcodes/iq2000-desc.c
@@ -105,7 +105,7 @@ const CGEN_ATTR_TABLE iq2000_cgen_insn_attr_table[] =
   { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
   { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
   { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
-  { "RELAX", &bool_attr[0], &bool_attr[0] },
+  { "RELAXED", &bool_attr[0], &bool_attr[0] },
   { "NO-DIS", &bool_attr[0], &bool_attr[0] },
   { "PBB", &bool_attr[0], &bool_attr[0] },
   { "YIELD-INSN", &bool_attr[0], &bool_attr[0] },

diff --git a/opcodes/iq2000-desc.h b/opcodes/iq2000-desc.h
index fe3a5e3f6ab3a2710a688b5a7d6524a74b43e2b0..13b4f56a80b3ae39a68e39002e8f5925762a955e 100644 (file)
--- a/opcodes/iq2000-desc.h
+++ b/opcodes/iq2000-desc.h
@@ -273,7 +273,7 @@ typedef enum cgen_operand_type {
 /* Enum declaration for cgen_insn attrs.  */
 typedef enum cgen_insn_attr {
   CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
- , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX
+ , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
  , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_YIELD_INSN, CGEN_INSN_LOAD_DELAY
  , CGEN_INSN_EVEN_REG_NUM, CGEN_INSN_UNSUPPORTED, CGEN_INSN_USES_RD, CGEN_INSN_USES_RS
  , CGEN_INSN_USES_RT, CGEN_INSN_USES_R31, CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31

diff --git a/opcodes/m32r-asm.c b/opcodes/m32r-asm.c
index 4abe187b81f2e222e514a20bdfa4414df606a622..2bd751af6db5aa8cce7c11152db1e401d4d52993 100644 (file)
--- a/opcodes/m32r-asm.c
+++ b/opcodes/m32r-asm.c
@@ -659,10 +659,10 @@ m32r_cgen_assemble_insn (cd, str, fields, buf, errmsg)
       if (! m32r_cgen_insn_supported (cd, insn))
        continue;
 #endif
-      /* If the RELAX attribute is set, this is an insn that shouldn't be
+      /* If the RELAXED attribute is set, this is an insn that shouldn't be
         chosen immediately.  Instead, it is used during assembler/linker
         relaxation if possible.  */
-      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
+      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
        continue;
 
       str = start;

diff --git a/opcodes/m32r-desc.c b/opcodes/m32r-desc.c
index 30a071985bd6676dc5c5ed788522508c7d492b48..023ab62bb9e49ef99ddbcc35a8f9ce732dfa0ca5 100644 (file)
--- a/opcodes/m32r-desc.c
+++ b/opcodes/m32r-desc.c
@@ -118,7 +118,7 @@ const CGEN_ATTR_TABLE m32r_cgen_insn_attr_table[] =
   { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
   { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
   { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
-  { "RELAX", &bool_attr[0], &bool_attr[0] },
+  { "RELAXED", &bool_attr[0], &bool_attr[0] },
   { "NO-DIS", &bool_attr[0], &bool_attr[0] },
   { "PBB", &bool_attr[0], &bool_attr[0] },
   { "FILL-SLOT", &bool_attr[0], &bool_attr[0] },

diff --git a/opcodes/m32r-desc.h b/opcodes/m32r-desc.h
index 85e22ee4dcdc29db5b0a9769ee17416ebdb14610..8781772f266ab7baf87e79b907fdbabf8a29f39c 100644 (file)
--- a/opcodes/m32r-desc.h
+++ b/opcodes/m32r-desc.h
@@ -204,7 +204,7 @@ typedef enum cgen_operand_type {
 /* Enum declaration for cgen_insn attrs.  */
 typedef enum cgen_insn_attr {
   CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
- , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX
+ , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
  , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_FILL_SLOT, CGEN_INSN_SPECIAL
  , CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_PIPE
  , CGEN_INSN_END_NBOOLS

diff --git a/opcodes/m32r-opc.c b/opcodes/m32r-opc.c
index b60c1bf36e0c51a0761f0b8327b87231c35493ec..8143b618520bb76540b0ee3ebf4f8d17a631a978 100644 (file)
--- a/opcodes/m32r-opc.c
+++ b/opcodes/m32r-opc.c
@@ -1187,7 +1187,7 @@ static const CGEN_IBASE m32r_cgen_macro_insn_table[] =
 /* bc $disp24 */
   {
     -1, "bc24r", "bc", 32,
-    { 0|A(RELAX)|A(COND_CTI)|A(ALIAS), { (1<<MACH_BASE), PIPE_NONE } }
+    { 0|A(RELAXED)|A(COND_CTI)|A(ALIAS), { (1<<MACH_BASE), PIPE_NONE } }
   },
 /* bl $disp8 */
   {
@@ -1197,7 +1197,7 @@ static const CGEN_IBASE m32r_cgen_macro_insn_table[] =
 /* bl $disp24 */
   {
     -1, "bl24r", "bl", 32,
-    { 0|A(RELAX)|A(UNCOND_CTI)|A(ALIAS), { (1<<MACH_BASE), PIPE_NONE } }
+    { 0|A(RELAXED)|A(UNCOND_CTI)|A(ALIAS), { (1<<MACH_BASE), PIPE_NONE } }
   },
 /* bcl $disp8 */
   {
@@ -1207,7 +1207,7 @@ static const CGEN_IBASE m32r_cgen_macro_insn_table[] =
 /* bcl $disp24 */
   {
     -1, "bcl24r", "bcl", 32,
-    { 0|A(RELAX)|A(COND_CTI)|A(ALIAS), { (1<<MACH_M32RX), PIPE_NONE } }
+    { 0|A(RELAXED)|A(COND_CTI)|A(ALIAS), { (1<<MACH_M32RX), PIPE_NONE } }
   },
 /* bnc $disp8 */
   {
@@ -1217,7 +1217,7 @@ static const CGEN_IBASE m32r_cgen_macro_insn_table[] =
 /* bnc $disp24 */
   {
     -1, "bnc24r", "bnc", 32,
-    { 0|A(RELAX)|A(COND_CTI)|A(ALIAS), { (1<<MACH_BASE), PIPE_NONE } }
+    { 0|A(RELAXED)|A(COND_CTI)|A(ALIAS), { (1<<MACH_BASE), PIPE_NONE } }
   },
 /* bra $disp8 */
   {
@@ -1227,7 +1227,7 @@ static const CGEN_IBASE m32r_cgen_macro_insn_table[] =
 /* bra $disp24 */
   {
     -1, "bra24r", "bra", 32,
-    { 0|A(RELAX)|A(UNCOND_CTI)|A(ALIAS), { (1<<MACH_BASE), PIPE_NONE } }
+    { 0|A(RELAXED)|A(UNCOND_CTI)|A(ALIAS), { (1<<MACH_BASE), PIPE_NONE } }
   },
 /* bncl $disp8 */
   {
@@ -1237,7 +1237,7 @@ static const CGEN_IBASE m32r_cgen_macro_insn_table[] =
 /* bncl $disp24 */
   {
     -1, "bncl24r", "bncl", 32,
-    { 0|A(RELAX)|A(COND_CTI)|A(ALIAS), { (1<<MACH_M32RX), PIPE_NONE } }
+    { 0|A(RELAXED)|A(COND_CTI)|A(ALIAS), { (1<<MACH_M32RX), PIPE_NONE } }
   },
 /* ld $dr,@($sr) */
   {

diff --git a/opcodes/openrisc-asm.c b/opcodes/openrisc-asm.c
index d47659b8c8fdf041a5b58666b09721db34c8555f..26b2625957fdb2395d4aa8f31230afe3f5e7c33f 100644 (file)
--- a/opcodes/openrisc-asm.c
+++ b/opcodes/openrisc-asm.c
@@ -578,10 +578,10 @@ openrisc_cgen_assemble_insn (cd, str, fields, buf, errmsg)
       if (! openrisc_cgen_insn_supported (cd, insn))
        continue;
 #endif
-      /* If the RELAX attribute is set, this is an insn that shouldn't be
+      /* If the RELAXED attribute is set, this is an insn that shouldn't be
         chosen immediately.  Instead, it is used during assembler/linker
         relaxation if possible.  */
-      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
+      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
        continue;
 
       str = start;

diff --git a/opcodes/openrisc-desc.c b/opcodes/openrisc-desc.c
index 6de9107f77ba9dddc2f90e7d814b4ceb1fc660a6..989b19586489ed6dcee01bb60f255cfb4853e3a2 100644 (file)
--- a/opcodes/openrisc-desc.c
+++ b/opcodes/openrisc-desc.c
@@ -112,7 +112,7 @@ const CGEN_ATTR_TABLE openrisc_cgen_insn_attr_table[] =
   { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
   { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
   { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
-  { "RELAX", &bool_attr[0], &bool_attr[0] },
+  { "RELAXED", &bool_attr[0], &bool_attr[0] },
   { "NO-DIS", &bool_attr[0], &bool_attr[0] },
   { "PBB", &bool_attr[0], &bool_attr[0] },
   { "NOT-IN-DELAY-SLOT", &bool_attr[0], &bool_attr[0] },

diff --git a/opcodes/openrisc-desc.h b/opcodes/openrisc-desc.h
index d1edee2f51cbd49d17a2fa63de7595e1f34d82de..0c7df17b8865809bbf5f9a346b28f1a5ce8c31d7 100644 (file)
--- a/opcodes/openrisc-desc.h
+++ b/opcodes/openrisc-desc.h
@@ -223,7 +223,7 @@ typedef enum cgen_operand_type {
 /* Enum declaration for cgen_insn attrs.  */
 typedef enum cgen_insn_attr {
   CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
- , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX
+ , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
  , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_NOT_IN_DELAY_SLOT, CGEN_INSN_END_BOOLS
  , CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_END_NBOOLS
 } CGEN_INSN_ATTR;

diff --git a/opcodes/xstormy16-asm.c b/opcodes/xstormy16-asm.c
index 324c091893eeea8e8c28ad24181e531519b6a2ab..810938c4a932089e5ecebbd76c0bd7e53f60b2f9 100644 (file)
--- a/opcodes/xstormy16-asm.c
+++ b/opcodes/xstormy16-asm.c
@@ -618,10 +618,10 @@ xstormy16_cgen_assemble_insn (cd, str, fields, buf, errmsg)
       if (! xstormy16_cgen_insn_supported (cd, insn))
        continue;
 #endif
-      /* If the RELAX attribute is set, this is an insn that shouldn't be
+      /* If the RELAXED attribute is set, this is an insn that shouldn't be
         chosen immediately.  Instead, it is used during assembler/linker
         relaxation if possible.  */
-      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
+      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
        continue;
 
       str = start;

diff --git a/opcodes/xstormy16-desc.c b/opcodes/xstormy16-desc.c
index 9c9f30bc58288b6856fb350c66d4373c2ed15f16..1c94fd7d853159f4fca818444ac61b4a6838f400 100644 (file)
--- a/opcodes/xstormy16-desc.c
+++ b/opcodes/xstormy16-desc.c
@@ -104,7 +104,7 @@ const CGEN_ATTR_TABLE xstormy16_cgen_insn_attr_table[] =
   { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
   { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
   { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
-  { "RELAX", &bool_attr[0], &bool_attr[0] },
+  { "RELAXED", &bool_attr[0], &bool_attr[0] },
   { "NO-DIS", &bool_attr[0], &bool_attr[0] },
   { "PBB", &bool_attr[0], &bool_attr[0] },
   { 0, 0, 0 }

diff --git a/opcodes/xstormy16-desc.h b/opcodes/xstormy16-desc.h
index a880321f7590dadd44e2cd4b9685fa5da58a8d0d..e6135058083f9978e7907b3a1925381f78735b0a 100644 (file)
--- a/opcodes/xstormy16-desc.h
+++ b/opcodes/xstormy16-desc.h
@@ -261,7 +261,7 @@ typedef enum cgen_operand_type {
 /* Enum declaration for cgen_insn attrs.  */
 typedef enum cgen_insn_attr {
   CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
- , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX
+ , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
  , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31
  , CGEN_INSN_MACH, CGEN_INSN_END_NBOOLS
 } CGEN_INSN_ATTR;