mtd: spinand: Use more specific naming for the reset op

SPI operations have been initially described through macros implicitly
implying the use of a single SPI SDR bus. Macros for supporting dual and
quad I/O transfers have been added on top, generally inspired by vendor
vendor naming, followed by DTR operations. Soon we might see octal
and even octal DTR operations as well (including the opcode byte).

Let's clarify what the macro really means by describing the expected bus
topology in the reset macro name.

Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index d16e42cf8faebd032ca08d54c33c73d8a8fd79d9..551df7f081536f7b626b754a7ecd937f1383dc8f 100644 (file)
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -596,7 +596,7 @@ static int spinand_read_id_op(struct spinand_device *spinand, u8 naddr,
 
 static int spinand_reset_op(struct spinand_device *spinand)
 {
-       struct spi_mem_op op = SPINAND_RESET_OP;
+       struct spi_mem_op op = SPINAND_RESET_1S_0_0_OP;
        int ret;
 
        ret = spi_mem_exec_op(spinand->spimem, &op);

diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 311f145eb4e8432d3cc1025135300cebe651e933..d1b9b630bd835278dd156922fda36603985002d9 100644 (file)
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -20,7 +20,7 @@
  * Standard SPI NAND flash operations
  */
 
-#define SPINAND_RESET_OP                                               \
+#define SPINAND_RESET_1S_0_0_OP                                                \
        SPI_MEM_OP(SPI_MEM_OP_CMD(0xff, 1),                             \
                   SPI_MEM_OP_NO_ADDR,                                  \
                   SPI_MEM_OP_NO_DUMMY,                                 \