]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
spi: ath79: Enable support for compile test
authorAlban Bedel <albeu@free.fr>
Wed, 16 Jan 2019 18:55:46 +0000 (19:55 +0100)
committerMark Brown <broonie@kernel.org>
Thu, 17 Jan 2019 12:34:47 +0000 (12:34 +0000)
To allow building this driver in compile test we need to remove all
dependency on headers from arch/mips/include. To allow this we
explicitly define all the registers locally instead of using
ar71xx_regs.h and we move the platform data struct definition to
include/linux/platform_data/spi-ath79.h.

Signed-off-by: Alban Bedel <albeu@free.fr>
Signed-off-by: Mark Brown <broonie@kernel.org>
arch/mips/ath79/dev-spi.h
drivers/spi/Kconfig
drivers/spi/spi-ath79.c
include/linux/platform_data/spi-ath79.h [moved from arch/mips/include/asm/mach-ath79/ath79_spi_platform.h with 100% similarity]

index d732565ca736e5edd0ba9fe5f53e124f209fb8bc..6e15bc8651beb74d27fc5f9ef71e055973a36618 100644 (file)
@@ -13,7 +13,7 @@
 #define _ATH79_DEV_SPI_H
 
 #include <linux/spi/spi.h>
-#include <asm/mach-ath79/ath79_spi_platform.h>
+#include <linux/platform_data/spi-ath79.h>
 
 void ath79_register_spi(struct ath79_spi_platform_data *pdata,
                         struct spi_board_info const *info,
index 128892c7e21ebdc628a693e132d58ee740904fff..71d3d2d5e5d1e46a343dc5f17a23bf56f82f5be8 100644 (file)
@@ -63,7 +63,7 @@ config SPI_ALTERA
 
 config SPI_ATH79
        tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver"
-       depends on ATH79
+       depends on ATH79 || COMPILE_TEST
        select SPI_BITBANG
        help
          This enables support for the SPI controller present on the
index edf695a359f4e045e195feb3877a4e4e117a51e6..09c4fb7fcf7a85fba94c616337d7907659543630 100644 (file)
 #include <linux/bitops.h>
 #include <linux/clk.h>
 #include <linux/err.h>
-
-#include <asm/mach-ath79/ar71xx_regs.h>
-#include <asm/mach-ath79/ath79_spi_platform.h>
+#include <linux/platform_data/spi-ath79.h>
 
 #define DRV_NAME       "ath79-spi"
 
 #define ATH79_SPI_RRW_DELAY_FACTOR     12000
 #define MHZ                            (1000 * 1000)
 
+#define AR71XX_SPI_REG_FS              0x00    /* Function Select */
+#define AR71XX_SPI_REG_CTRL            0x04    /* SPI Control */
+#define AR71XX_SPI_REG_IOC             0x08    /* SPI I/O Control */
+#define AR71XX_SPI_REG_RDS             0x0c    /* Read Data Shift */
+
+#define AR71XX_SPI_FS_GPIO             BIT(0)  /* Enable GPIO mode */
+
+#define AR71XX_SPI_IOC_DO              BIT(0)  /* Data Out pin */
+#define AR71XX_SPI_IOC_CLK             BIT(8)  /* CLK pin */
+#define AR71XX_SPI_IOC_CS(n)           BIT(16 + (n))
+
 struct ath79_spi {
        struct spi_bitbang      bitbang;
        u32                     ioc_base;