]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
4.1-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 17 Oct 2015 22:04:26 +0000 (15:04 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 17 Oct 2015 22:04:26 +0000 (15:04 -0700)
added patches:
ath10k-reject-11b-tx-fragmentation-configuration.patch
cifs-use-server-timestamp-for-ntlmv2-authentication.patch
device-property-fix-potential-null-pointer-dereference.patch
docs-update-howto-for-3.x-4.x-versioning.patch
dts-imx25-fix-sd-card-gpio-polarity-specified-in-device-tree.patch
dts-imx51-fix-sd-card-gpio-polarity-specified-in-device-tree.patch
dts-imx53-fix-sd-card-gpio-polarity-specified-in-device-tree.patch
dts-imx6-fix-sd-card-gpio-polarity-specified-in-device-tree.patch
ipr-enable-sis-pipe-commands-for-sis-32-devices.patch
irqchip-atmel-aic5-use-per-chip-mask-caches-in-mask-unmask.patch
irqchip-gic-v3-its-add-missing-cache-flushes.patch
mmc-dw_mmc-handle-data-blocks-than-4kb-if-idmac-is-used.patch
mmc-sdhci-esdhc-imx-do-not-break-platform-data-boards.patch
mmc-sdhci-esdhc-imx-fix-cd-regression-for-dt-platform.patch
mmc-sdhci-esdhc-imx-move-mmc_of_parse-to-the-dt-probe.patch
mtd-nand-sunxi-fix-oob-handling-in-write_xxx-functions.patch
mtd-nand-sunxi-fix-sunxi_nand_chips_cleanup.patch
mtd-pxa3xx_nand-add-a-default-chunk-size.patch
pcmcia-sa11x0-fix-missing-clk_put-in-sa11x0-socket-drivers.patch
pm-avs-rockchip-io-depend-on-config_power_avs.patch
regmap-debugfs-don-t-bother-actually-printing-when-calculating-max-length.patch
regmap-debugfs-ensure-we-don-t-underflow-when-printing-access-masks.patch
security-fix-typo-in-security_task_prctl.patch
usb-chipidea-imx-fix-a-typo-for-imx6sx.patch

25 files changed:
queue-4.1/ath10k-reject-11b-tx-fragmentation-configuration.patch [new file with mode: 0644]
queue-4.1/cifs-use-server-timestamp-for-ntlmv2-authentication.patch [new file with mode: 0644]
queue-4.1/device-property-fix-potential-null-pointer-dereference.patch [new file with mode: 0644]
queue-4.1/docs-update-howto-for-3.x-4.x-versioning.patch [new file with mode: 0644]
queue-4.1/dts-imx25-fix-sd-card-gpio-polarity-specified-in-device-tree.patch [new file with mode: 0644]
queue-4.1/dts-imx51-fix-sd-card-gpio-polarity-specified-in-device-tree.patch [new file with mode: 0644]
queue-4.1/dts-imx53-fix-sd-card-gpio-polarity-specified-in-device-tree.patch [new file with mode: 0644]
queue-4.1/dts-imx6-fix-sd-card-gpio-polarity-specified-in-device-tree.patch [new file with mode: 0644]
queue-4.1/ipr-enable-sis-pipe-commands-for-sis-32-devices.patch [new file with mode: 0644]
queue-4.1/irqchip-atmel-aic5-use-per-chip-mask-caches-in-mask-unmask.patch [new file with mode: 0644]
queue-4.1/irqchip-gic-v3-its-add-missing-cache-flushes.patch [new file with mode: 0644]
queue-4.1/mmc-dw_mmc-handle-data-blocks-than-4kb-if-idmac-is-used.patch [new file with mode: 0644]
queue-4.1/mmc-sdhci-esdhc-imx-do-not-break-platform-data-boards.patch [new file with mode: 0644]
queue-4.1/mmc-sdhci-esdhc-imx-fix-cd-regression-for-dt-platform.patch [new file with mode: 0644]
queue-4.1/mmc-sdhci-esdhc-imx-move-mmc_of_parse-to-the-dt-probe.patch [new file with mode: 0644]
queue-4.1/mtd-nand-sunxi-fix-oob-handling-in-write_xxx-functions.patch [new file with mode: 0644]
queue-4.1/mtd-nand-sunxi-fix-sunxi_nand_chips_cleanup.patch [new file with mode: 0644]
queue-4.1/mtd-pxa3xx_nand-add-a-default-chunk-size.patch [new file with mode: 0644]
queue-4.1/pcmcia-sa11x0-fix-missing-clk_put-in-sa11x0-socket-drivers.patch [new file with mode: 0644]
queue-4.1/pm-avs-rockchip-io-depend-on-config_power_avs.patch [new file with mode: 0644]
queue-4.1/regmap-debugfs-don-t-bother-actually-printing-when-calculating-max-length.patch [new file with mode: 0644]
queue-4.1/regmap-debugfs-ensure-we-don-t-underflow-when-printing-access-masks.patch [new file with mode: 0644]
queue-4.1/security-fix-typo-in-security_task_prctl.patch [new file with mode: 0644]
queue-4.1/series
queue-4.1/usb-chipidea-imx-fix-a-typo-for-imx6sx.patch [new file with mode: 0644]

diff --git a/queue-4.1/ath10k-reject-11b-tx-fragmentation-configuration.patch b/queue-4.1/ath10k-reject-11b-tx-fragmentation-configuration.patch
new file mode 100644 (file)
index 0000000..30b7833
--- /dev/null
@@ -0,0 +1,66 @@
+From 92092fe528e79c9bd25784ca0ef341d5a1d1b642 Mon Sep 17 00:00:00 2001
+From: Michal Kazior <michal.kazior@tieto.com>
+Date: Mon, 3 Aug 2015 11:16:43 +0200
+Subject: ath10k: reject 11b tx fragmentation configuration
+
+From: Michal Kazior <michal.kazior@tieto.com>
+
+commit 92092fe528e79c9bd25784ca0ef341d5a1d1b642 upstream.
+
+Even though there's a WMI enum for fragmentation
+threshold no known firmware actually implements
+it. Moreover it is not possible to rely frame
+fragmentation to mac80211 because firmware clears
+the "more fragments" bit in frame control making
+it impossible for remote devices to reassemble
+frames.
+
+Hence implement a dummy callback just to say
+fragmentation isn't supported. This effectively
+prevents mac80211 from doing frame fragmentation
+in software.
+
+This fixes Tx becoming broken after setting
+fragmentation threshold.
+
+Fixes: 1010ba4c5d1c ("ath10k: unregister and remove frag_threshold callback")
+Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
+Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/wireless/ath/ath10k/mac.c |   16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+--- a/drivers/net/wireless/ath/ath10k/mac.c
++++ b/drivers/net/wireless/ath/ath10k/mac.c
+@@ -4464,6 +4464,21 @@ static int ath10k_set_rts_threshold(stru
+       return ret;
+ }
++static int ath10k_mac_op_set_frag_threshold(struct ieee80211_hw *hw, u32 value)
++{
++      /* Even though there's a WMI enum for fragmentation threshold no known
++       * firmware actually implements it. Moreover it is not possible to rely
++       * frame fragmentation to mac80211 because firmware clears the "more
++       * fragments" bit in frame control making it impossible for remote
++       * devices to reassemble frames.
++       *
++       * Hence implement a dummy callback just to say fragmentation isn't
++       * supported. This effectively prevents mac80211 from doing frame
++       * fragmentation in software.
++       */
++      return -EOPNOTSUPP;
++}
++
+ static void ath10k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
+                        u32 queues, bool drop)
+ {
+@@ -5108,6 +5123,7 @@ static const struct ieee80211_ops ath10k
+       .remain_on_channel              = ath10k_remain_on_channel,
+       .cancel_remain_on_channel       = ath10k_cancel_remain_on_channel,
+       .set_rts_threshold              = ath10k_set_rts_threshold,
++      .set_frag_threshold             = ath10k_mac_op_set_frag_threshold,
+       .flush                          = ath10k_flush,
+       .tx_last_beacon                 = ath10k_tx_last_beacon,
+       .set_antenna                    = ath10k_set_antenna,
diff --git a/queue-4.1/cifs-use-server-timestamp-for-ntlmv2-authentication.patch b/queue-4.1/cifs-use-server-timestamp-for-ntlmv2-authentication.patch
new file mode 100644 (file)
index 0000000..15188dc
--- /dev/null
@@ -0,0 +1,123 @@
+From 98ce94c8df762d413b3ecb849e2b966b21606d04 Mon Sep 17 00:00:00 2001
+From: Peter Seiderer <ps.report@gmx.net>
+Date: Thu, 17 Sep 2015 21:40:12 +0200
+Subject: cifs: use server timestamp for ntlmv2 authentication
+
+From: Peter Seiderer <ps.report@gmx.net>
+
+commit 98ce94c8df762d413b3ecb849e2b966b21606d04 upstream.
+
+Linux cifs mount with ntlmssp against an Mac OS X (Yosemite
+10.10.5) share fails in case the clocks differ more than +/-2h:
+
+digest-service: digest-request: od failed with 2 proto=ntlmv2
+digest-service: digest-request: kdc failed with -1561745592 proto=ntlmv2
+
+Fix this by (re-)using the given server timestamp for the
+ntlmv2 authentication (as Windows 7 does).
+
+A related problem was also reported earlier by Namjae Jaen (see below):
+
+Windows machine has extended security feature which refuse to allow
+authentication when there is time difference between server time and
+client time when ntlmv2 negotiation is used. This problem is prevalent
+in embedded enviornment where system time is set to default 1970.
+
+Modern servers send the server timestamp in the TargetInfo Av_Pair
+structure in the challenge message [see MS-NLMP 2.2.2.1]
+In [MS-NLMP 3.1.5.1.2] it is explicitly mentioned that the client must
+use the server provided timestamp if present OR current time if it is
+not
+
+Reported-by: Namjae Jeon <namjae.jeon@samsung.com>
+Signed-off-by: Peter Seiderer <ps.report@gmx.net>
+Signed-off-by: Steve French <smfrench@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ fs/cifs/cifsencrypt.c |   53 ++++++++++++++++++++++++++++++++++++++++++++++++--
+ 1 file changed, 51 insertions(+), 2 deletions(-)
+
+--- a/fs/cifs/cifsencrypt.c
++++ b/fs/cifs/cifsencrypt.c
+@@ -444,6 +444,48 @@ find_domain_name(struct cifs_ses *ses, c
+       return 0;
+ }
++/* Server has provided av pairs/target info in the type 2 challenge
++ * packet and we have plucked it and stored within smb session.
++ * We parse that blob here to find the server given timestamp
++ * as part of ntlmv2 authentication (or local current time as
++ * default in case of failure)
++ */
++static __le64
++find_timestamp(struct cifs_ses *ses)
++{
++      unsigned int attrsize;
++      unsigned int type;
++      unsigned int onesize = sizeof(struct ntlmssp2_name);
++      unsigned char *blobptr;
++      unsigned char *blobend;
++      struct ntlmssp2_name *attrptr;
++
++      if (!ses->auth_key.len || !ses->auth_key.response)
++              return 0;
++
++      blobptr = ses->auth_key.response;
++      blobend = blobptr + ses->auth_key.len;
++
++      while (blobptr + onesize < blobend) {
++              attrptr = (struct ntlmssp2_name *) blobptr;
++              type = le16_to_cpu(attrptr->type);
++              if (type == NTLMSSP_AV_EOL)
++                      break;
++              blobptr += 2; /* advance attr type */
++              attrsize = le16_to_cpu(attrptr->length);
++              blobptr += 2; /* advance attr size */
++              if (blobptr + attrsize > blobend)
++                      break;
++              if (type == NTLMSSP_AV_TIMESTAMP) {
++                      if (attrsize == sizeof(u64))
++                              return *((__le64 *)blobptr);
++              }
++              blobptr += attrsize; /* advance attr value */
++      }
++
++      return cpu_to_le64(cifs_UnixTimeToNT(CURRENT_TIME));
++}
++
+ static int calc_ntlmv2_hash(struct cifs_ses *ses, char *ntlmv2_hash,
+                           const struct nls_table *nls_cp)
+ {
+@@ -641,6 +683,7 @@ setup_ntlmv2_rsp(struct cifs_ses *ses, c
+       struct ntlmv2_resp *ntlmv2;
+       char ntlmv2_hash[16];
+       unsigned char *tiblob = NULL; /* target info blob */
++      __le64 rsp_timestamp;
+       if (ses->server->negflavor == CIFS_NEGFLAVOR_EXTENDED) {
+               if (!ses->domainName) {
+@@ -659,6 +702,12 @@ setup_ntlmv2_rsp(struct cifs_ses *ses, c
+               }
+       }
++      /* Must be within 5 minutes of the server (or in range +/-2h
++       * in case of Mac OS X), so simply carry over server timestamp
++       * (as Windows 7 does)
++       */
++      rsp_timestamp = find_timestamp(ses);
++
+       baselen = CIFS_SESS_KEY_SIZE + sizeof(struct ntlmv2_resp);
+       tilen = ses->auth_key.len;
+       tiblob = ses->auth_key.response;
+@@ -675,8 +724,8 @@ setup_ntlmv2_rsp(struct cifs_ses *ses, c
+                       (ses->auth_key.response + CIFS_SESS_KEY_SIZE);
+       ntlmv2->blob_signature = cpu_to_le32(0x00000101);
+       ntlmv2->reserved = 0;
+-      /* Must be within 5 minutes of the server */
+-      ntlmv2->time = cpu_to_le64(cifs_UnixTimeToNT(CURRENT_TIME));
++      ntlmv2->time = rsp_timestamp;
++
+       get_random_bytes(&ntlmv2->client_chal, sizeof(ntlmv2->client_chal));
+       ntlmv2->reserved2 = 0;
diff --git a/queue-4.1/device-property-fix-potential-null-pointer-dereference.patch b/queue-4.1/device-property-fix-potential-null-pointer-dereference.patch
new file mode 100644 (file)
index 0000000..b5f00af
--- /dev/null
@@ -0,0 +1,39 @@
+From ecc87eed7beeb50c0be0b73322d62135277ea2b0 Mon Sep 17 00:00:00 2001
+From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+Date: Wed, 5 Aug 2015 16:51:11 +0300
+Subject: device property: fix potential NULL pointer dereference
+
+From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+
+commit ecc87eed7beeb50c0be0b73322d62135277ea2b0 upstream.
+
+In device_add_property_set() we check pset parameter for a NULL, but few lines
+later we do a pointer arithmetic without check that will crash kernel in the
+set_secondary_fwnode().
+
+Here we check if pset parameter is NULL and return immediately.
+
+Fixes: 16ba08d5c9ec (device property: Introduce firmware node type for platform data)
+Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/base/property.c |    5 +++--
+ 1 file changed, 3 insertions(+), 2 deletions(-)
+
+--- a/drivers/base/property.c
++++ b/drivers/base/property.c
+@@ -26,9 +26,10 @@
+  */
+ void device_add_property_set(struct device *dev, struct property_set *pset)
+ {
+-      if (pset)
+-              pset->fwnode.type = FWNODE_PDATA;
++      if (!pset)
++              return;
++      pset->fwnode.type = FWNODE_PDATA;
+       set_secondary_fwnode(dev, &pset->fwnode);
+ }
+ EXPORT_SYMBOL_GPL(device_add_property_set);
diff --git a/queue-4.1/docs-update-howto-for-3.x-4.x-versioning.patch b/queue-4.1/docs-update-howto-for-3.x-4.x-versioning.patch
new file mode 100644 (file)
index 0000000..58b8cef
--- /dev/null
@@ -0,0 +1,91 @@
+From e4144fe5d47c91c92d36cdbd5f31ed8d6e3a57ab Mon Sep 17 00:00:00 2001
+From: Mario Carrillo <mario.alfredo.c.arevalo@intel.com>
+Date: Mon, 24 Aug 2015 09:33:09 -0500
+Subject: docs: update HOWTO for 3.x -> 4.x versioning
+
+From: Mario Carrillo <mario.alfredo.c.arevalo@intel.com>
+
+commit e4144fe5d47c91c92d36cdbd5f31ed8d6e3a57ab upstream.
+
+The HOWTO document needed updating for the new kernel versioning.
+
+Signed-off-by: Mario Carrillo <mario.alfredo.c.arevalo@intel.com>
+Signed-off-by: Jonathan Corbet <corbet@lwn.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ Documentation/HOWTO |   28 ++++++++++++++--------------
+ 1 file changed, 14 insertions(+), 14 deletions(-)
+
+--- a/Documentation/HOWTO
++++ b/Documentation/HOWTO
+@@ -218,16 +218,16 @@ The development process
+ Linux kernel development process currently consists of a few different
+ main kernel "branches" and lots of different subsystem-specific kernel
+ branches.  These different branches are:
+-  - main 3.x kernel tree
+-  - 3.x.y -stable kernel tree
+-  - 3.x -git kernel patches
++  - main 4.x kernel tree
++  - 4.x.y -stable kernel tree
++  - 4.x -git kernel patches
+   - subsystem specific kernel trees and patches
+-  - the 3.x -next kernel tree for integration tests
++  - the 4.x -next kernel tree for integration tests
+-3.x kernel tree
++4.x kernel tree
+ -----------------
+-3.x kernels are maintained by Linus Torvalds, and can be found on
+-kernel.org in the pub/linux/kernel/v3.x/ directory.  Its development
++4.x kernels are maintained by Linus Torvalds, and can be found on
++kernel.org in the pub/linux/kernel/v4.x/ directory.  Its development
+ process is as follows:
+   - As soon as a new kernel is released a two weeks window is open,
+     during this period of time maintainers can submit big diffs to
+@@ -262,20 +262,20 @@ mailing list about kernel releases:
+       released according to perceived bug status, not according to a
+       preconceived timeline."
+-3.x.y -stable kernel tree
++4.x.y -stable kernel tree
+ ---------------------------
+ Kernels with 3-part versions are -stable kernels. They contain
+ relatively small and critical fixes for security problems or significant
+-regressions discovered in a given 3.x kernel.
++regressions discovered in a given 4.x kernel.
+ This is the recommended branch for users who want the most recent stable
+ kernel and are not interested in helping test development/experimental
+ versions.
+-If no 3.x.y kernel is available, then the highest numbered 3.x
++If no 4.x.y kernel is available, then the highest numbered 4.x
+ kernel is the current stable kernel.
+-3.x.y are maintained by the "stable" team <stable@vger.kernel.org>, and
++4.x.y are maintained by the "stable" team <stable@vger.kernel.org>, and
+ are released as needs dictate.  The normal release period is approximately
+ two weeks, but it can be longer if there are no pressing problems.  A
+ security-related problem, instead, can cause a release to happen almost
+@@ -285,7 +285,7 @@ The file Documentation/stable_kernel_rul
+ documents what kinds of changes are acceptable for the -stable tree, and
+ how the release process works.
+-3.x -git patches
++4.x -git patches
+ ------------------
+ These are daily snapshots of Linus' kernel tree which are managed in a
+ git repository (hence the name.) These patches are usually released
+@@ -317,9 +317,9 @@ revisions to it, and maintainers can mar
+ accepted, or rejected.  Most of these patchwork sites are listed at
+ http://patchwork.kernel.org/.
+-3.x -next kernel tree for integration tests
++4.x -next kernel tree for integration tests
+ ---------------------------------------------
+-Before updates from subsystem trees are merged into the mainline 3.x
++Before updates from subsystem trees are merged into the mainline 4.x
+ tree, they need to be integration-tested.  For this purpose, a special
+ testing repository exists into which virtually all subsystem trees are
+ pulled on an almost daily basis:
diff --git a/queue-4.1/dts-imx25-fix-sd-card-gpio-polarity-specified-in-device-tree.patch b/queue-4.1/dts-imx25-fix-sd-card-gpio-polarity-specified-in-device-tree.patch
new file mode 100644 (file)
index 0000000..5f58177
--- /dev/null
@@ -0,0 +1,45 @@
+From cf75eb15be2bdd054a76aeef6458beaa4a6ab770 Mon Sep 17 00:00:00 2001
+From: Dong Aisheng <aisheng.dong@freescale.com>
+Date: Wed, 22 Jul 2015 20:53:03 +0800
+Subject: dts: imx25: fix sd card gpio polarity specified in device tree
+
+From: Dong Aisheng <aisheng.dong@freescale.com>
+
+commit cf75eb15be2bdd054a76aeef6458beaa4a6ab770 upstream.
+
+cd-gpios polarity should be changed to GPIO_ACTIVE_LOW and wp-gpios
+should be changed to GPIO_ACTIVE_HIGH.
+Otherwise, the SD may not work properly due to wrong polarity inversion
+specified in DT after switch to common parsing function mmc_of_parse().
+
+Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com>
+Acked-by: Shawn Guo <shawnguo@kernel.org>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/boot/dts/imx25-pdk.dts |    5 +++--
+ 1 file changed, 3 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/imx25-pdk.dts
++++ b/arch/arm/boot/dts/imx25-pdk.dts
+@@ -10,6 +10,7 @@
+  */
+ /dts-v1/;
++#include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/input/input.h>
+ #include "imx25.dtsi"
+@@ -114,8 +115,8 @@
+ &esdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc1>;
+-      cd-gpios = <&gpio2 1 0>;
+-      wp-gpios = <&gpio2 0 0>;
++      cd-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+ };
diff --git a/queue-4.1/dts-imx51-fix-sd-card-gpio-polarity-specified-in-device-tree.patch b/queue-4.1/dts-imx51-fix-sd-card-gpio-polarity-specified-in-device-tree.patch
new file mode 100644 (file)
index 0000000..d19d29b
--- /dev/null
@@ -0,0 +1,35 @@
+From aca45c0e95dad1c4ba4d38da192756b0e10cbbbd Mon Sep 17 00:00:00 2001
+From: Dong Aisheng <aisheng.dong@freescale.com>
+Date: Wed, 22 Jul 2015 20:53:00 +0800
+Subject: dts: imx51: fix sd card gpio polarity specified in device tree
+
+From: Dong Aisheng <aisheng.dong@freescale.com>
+
+commit aca45c0e95dad1c4ba4d38da192756b0e10cbbbd upstream.
+
+cd-gpios polarity should be changed to GPIO_ACTIVE_LOW and wp-gpios
+should be changed to GPIO_ACTIVE_HIGH.
+Otherwise, the SD may not work properly due to wrong polarity inversion
+specified in DT after switch to common parsing function mmc_of_parse().
+
+Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com>
+Acked-by: Shawn Guo <shawnguo@kernel.org>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/boot/dts/imx51-apf51dev.dts |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/imx51-apf51dev.dts
++++ b/arch/arm/boot/dts/imx51-apf51dev.dts
+@@ -98,7 +98,7 @@
+ &esdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc1>;
+-      cd-gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
+       bus-width = <4>;
+       status = "okay";
+ };
diff --git a/queue-4.1/dts-imx53-fix-sd-card-gpio-polarity-specified-in-device-tree.patch b/queue-4.1/dts-imx53-fix-sd-card-gpio-polarity-specified-in-device-tree.patch
new file mode 100644 (file)
index 0000000..fd77f79
--- /dev/null
@@ -0,0 +1,128 @@
+From 94d76946859b4bcfa0da373357f14feda2af0622 Mon Sep 17 00:00:00 2001
+From: Dong Aisheng <aisheng.dong@freescale.com>
+Date: Wed, 22 Jul 2015 20:53:01 +0800
+Subject: dts: imx53: fix sd card gpio polarity specified in device tree
+
+From: Dong Aisheng <aisheng.dong@freescale.com>
+
+commit 94d76946859b4bcfa0da373357f14feda2af0622 upstream.
+
+cd-gpios polarity should be changed to GPIO_ACTIVE_LOW and wp-gpios
+should be changed to GPIO_ACTIVE_HIGH.
+Otherwise, the SD may not work properly due to wrong polarity inversion
+specified in DT after switch to common parsing function mmc_of_parse().
+
+Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com>
+Acked-by: Shawn Guo <shawnguo@kernel.org>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/boot/dts/imx53-ard.dts         |    4 ++--
+ arch/arm/boot/dts/imx53-m53evk.dts      |    4 ++--
+ arch/arm/boot/dts/imx53-qsb-common.dtsi |    4 ++--
+ arch/arm/boot/dts/imx53-smd.dts         |    4 ++--
+ arch/arm/boot/dts/imx53-tqma53.dtsi     |    4 ++--
+ arch/arm/boot/dts/imx53-tx53.dtsi       |    4 ++--
+ arch/arm/boot/dts/imx53-voipac-bsb.dts  |    4 ++--
+ 7 files changed, 14 insertions(+), 14 deletions(-)
+
+--- a/arch/arm/boot/dts/imx53-ard.dts
++++ b/arch/arm/boot/dts/imx53-ard.dts
+@@ -103,8 +103,8 @@
+ &esdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc1>;
+-      cd-gpios = <&gpio1 1 0>;
+-      wp-gpios = <&gpio1 9 0>;
++      cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+ };
+--- a/arch/arm/boot/dts/imx53-m53evk.dts
++++ b/arch/arm/boot/dts/imx53-m53evk.dts
+@@ -124,8 +124,8 @@
+ &esdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc1>;
+-      cd-gpios = <&gpio1 1 0>;
+-      wp-gpios = <&gpio1 9 0>;
++      cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+ };
+--- a/arch/arm/boot/dts/imx53-qsb-common.dtsi
++++ b/arch/arm/boot/dts/imx53-qsb-common.dtsi
+@@ -147,8 +147,8 @@
+ &esdhc3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc3>;
+-      cd-gpios = <&gpio3 11 0>;
+-      wp-gpios = <&gpio3 12 0>;
++      cd-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
+       bus-width = <8>;
+       status = "okay";
+ };
+--- a/arch/arm/boot/dts/imx53-smd.dts
++++ b/arch/arm/boot/dts/imx53-smd.dts
+@@ -41,8 +41,8 @@
+ &esdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc1>;
+-      cd-gpios = <&gpio3 13 0>;
+-      wp-gpios = <&gpio4 11 0>;
++      cd-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+ };
+--- a/arch/arm/boot/dts/imx53-tqma53.dtsi
++++ b/arch/arm/boot/dts/imx53-tqma53.dtsi
+@@ -41,8 +41,8 @@
+       pinctrl-0 = <&pinctrl_esdhc2>,
+                   <&pinctrl_esdhc2_cdwp>;
+       vmmc-supply = <&reg_3p3v>;
+-      wp-gpios = <&gpio1 2 0>;
+-      cd-gpios = <&gpio1 4 0>;
++      wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+       status = "disabled";
+ };
+--- a/arch/arm/boot/dts/imx53-tx53.dtsi
++++ b/arch/arm/boot/dts/imx53-tx53.dtsi
+@@ -183,7 +183,7 @@
+ };
+ &esdhc1 {
+-      cd-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
+       fsl,wp-controller;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc1>;
+@@ -191,7 +191,7 @@
+ };
+ &esdhc2 {
+-      cd-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
+       fsl,wp-controller;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc2>;
+--- a/arch/arm/boot/dts/imx53-voipac-bsb.dts
++++ b/arch/arm/boot/dts/imx53-voipac-bsb.dts
+@@ -119,8 +119,8 @@
+ &esdhc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc2>;
+-      cd-gpios = <&gpio3 25 0>;
+-      wp-gpios = <&gpio2 19 0>;
++      cd-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+       vmmc-supply = <&reg_3p3v>;
+       status = "okay";
+ };
diff --git a/queue-4.1/dts-imx6-fix-sd-card-gpio-polarity-specified-in-device-tree.patch b/queue-4.1/dts-imx6-fix-sd-card-gpio-polarity-specified-in-device-tree.patch
new file mode 100644 (file)
index 0000000..adb2cd2
--- /dev/null
@@ -0,0 +1,500 @@
+From 89c1a8cf63f8c69dfddb6e377c04df8b25ab1c88 Mon Sep 17 00:00:00 2001
+From: Dong Aisheng <aisheng.dong@freescale.com>
+Date: Wed, 22 Jul 2015 20:53:02 +0800
+Subject: dts: imx6: fix sd card gpio polarity specified in device tree
+
+From: Dong Aisheng <aisheng.dong@freescale.com>
+
+commit 89c1a8cf63f8c69dfddb6e377c04df8b25ab1c88 upstream.
+
+cd-gpios polarity should be changed to GPIO_ACTIVE_LOW and wp-gpios
+should be changed to GPIO_ACTIVE_HIGH.
+Otherwise, the SD may not work properly due to wrong polarity inversion
+specified in DT after switch to common parsing function mmc_of_parse().
+
+Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com>
+Acked-by: Shawn Guo <shawnguo@kernel.org>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+diff --git a/arch/arm/boot/dts/imx6dl-riotboard.dts b/arch/arm/boot/dts/imx6dl-riotboard.dts
+index 43cb3fd76be7..5111f5170d53 100644
+--- a/arch/arm/boot/dts/imx6dl-riotboard.dts
++++ b/arch/arm/boot/dts/imx6dl-riotboard.dts
+@@ -305,8 +305,8 @@
+ &usdhc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+-      cd-gpios = <&gpio1 4 0>;
+-      wp-gpios = <&gpio1 2 0>;
++      cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+       vmmc-supply = <&reg_3p3v>;
+       status = "okay";
+ };
+@@ -314,8 +314,8 @@
+ &usdhc3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+-      cd-gpios = <&gpio7 0 0>;
+-      wp-gpios = <&gpio7 1 0>;
++      cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
+       vmmc-supply = <&reg_3p3v>;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts
+index 78df05e9d1ce..d6515f7a56c4 100644
+--- a/arch/arm/boot/dts/imx6q-arm2.dts
++++ b/arch/arm/boot/dts/imx6q-arm2.dts
+@@ -11,6 +11,7 @@
+  */
+ /dts-v1/;
++#include <dt-bindings/gpio/gpio.h>
+ #include "imx6q.dtsi"
+ / {
+@@ -196,8 +197,8 @@
+ };
+ &usdhc3 {
+-      cd-gpios = <&gpio6 11 0>;
+-      wp-gpios = <&gpio6 14 0>;
++      cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>;
+       vmmc-supply = <&reg_3p3v>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc3
+diff --git a/arch/arm/boot/dts/imx6q-gk802.dts b/arch/arm/boot/dts/imx6q-gk802.dts
+index 703539cf36d3..00bd63e63d0c 100644
+--- a/arch/arm/boot/dts/imx6q-gk802.dts
++++ b/arch/arm/boot/dts/imx6q-gk802.dts
+@@ -7,6 +7,7 @@
+  */
+ /dts-v1/;
++#include <dt-bindings/gpio/gpio.h>
+ #include "imx6q.dtsi"
+ / {
+@@ -161,7 +162,7 @@
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       bus-width = <4>;
+-      cd-gpios = <&gpio6 11 0>;
++      cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
+       vmmc-supply = <&reg_3p3v>;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6q-tbs2910.dts b/arch/arm/boot/dts/imx6q-tbs2910.dts
+index a43abfa21e33..5645d52850a7 100644
+--- a/arch/arm/boot/dts/imx6q-tbs2910.dts
++++ b/arch/arm/boot/dts/imx6q-tbs2910.dts
+@@ -251,7 +251,7 @@
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+       bus-width = <4>;
+-      cd-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+       vmmc-supply = <&reg_3p3v>;
+       status = "okay";
+ };
+@@ -260,7 +260,7 @@
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       bus-width = <4>;
+-      cd-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+       wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
+       vmmc-supply = <&reg_3p3v>;
+       status = "okay";
+diff --git a/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi b/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
+index e6d9195a1da7..f4d6ae564ead 100644
+--- a/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
+@@ -173,7 +173,7 @@
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc1>;
+       vmmc-supply = <&reg_3p3v>;
+-      cd-gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
+       status = "okay";
+ };
+@@ -181,7 +181,7 @@
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+       vmmc-supply = <&reg_3p3v>;
+-      cd-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi b/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
+index 1d85de2befb3..a47a0399a172 100644
+--- a/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
+@@ -392,7 +392,7 @@
+ &usdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc1>;
+-      cd-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
+       no-1-8-v;
+       status = "okay";
+ };
+@@ -400,7 +400,7 @@
+ &usdhc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+-      cd-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
+       wp-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
+       no-1-8-v;
+       status = "okay";
+diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+index 59e5d15e3ec4..ff41f83551de 100644
+--- a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+@@ -258,6 +258,6 @@
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_cubox_i_usdhc2_aux &pinctrl_cubox_i_usdhc2>;
+       vmmc-supply = <&reg_3p3v>;
+-      cd-gpios = <&gpio1 4 0>;
++      cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
+index 2c253d6d20bd..45e7c39e80d5 100644
+--- a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
+@@ -1,3 +1,5 @@
++#include <dt-bindings/gpio/gpio.h>
++
+ / {
+       regulators {
+               compatible = "simple-bus";
+@@ -181,7 +183,7 @@
+ &usdhc2 { /* module slot */
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+-      cd-gpios = <&gpio2 2 0>;
++      cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+index b5756c21ea1d..4493f6e99330 100644
+--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+@@ -318,7 +318,7 @@
+ &usdhc3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+-      cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
+       vmmc-supply = <&reg_3p3v>;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+index 86f03c1b147c..a857d1294609 100644
+--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+@@ -324,7 +324,7 @@
+ &usdhc3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+-      cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
+       vmmc-supply = <&reg_3p3v>;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+index 4a8d97f47759..1afe3385e2d2 100644
+--- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+@@ -417,7 +417,7 @@
+ &usdhc3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+-      cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
+       vmmc-supply = <&reg_3p3v>;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
+index 62a82f3eba88..6dd0b764e036 100644
+--- a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
+@@ -299,6 +299,6 @@
+               &pinctrl_hummingboard_usdhc2
+       >;
+       vmmc-supply = <&reg_3p3v>;
+-      cd-gpios = <&gpio1 4 0>;
++      cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+index 3af16dfe417b..d7fe6672d00c 100644
+--- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+@@ -453,7 +453,7 @@
+ &usdhc3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+-      cd-gpios = <&gpio7 0 0>;
++      cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
+       vmmc-supply = <&reg_3p3v>;
+       status = "okay";
+ };
+@@ -461,7 +461,7 @@
+ &usdhc4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc4>;
+-      cd-gpios = <&gpio2 6 0>;
++      cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
+       vmmc-supply = <&reg_3p3v>;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+index 1ce6133b67f5..9e6ecd99b472 100644
+--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+@@ -409,8 +409,8 @@
+ &usdhc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+-      cd-gpios = <&gpio1 4 0>;
+-      wp-gpios = <&gpio1 2 0>;
++      cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+       status = "disabled";
+ };
+@@ -418,7 +418,7 @@
+         pinctrl-names = "default";
+         pinctrl-0 = <&pinctrl_usdhc3
+                    &pinctrl_usdhc3_cdwp>;
+-        cd-gpios = <&gpio1 27 0>;
+-        wp-gpios = <&gpio1 29 0>;
++      cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+         status = "disabled";
+ };
+diff --git a/arch/arm/boot/dts/imx6qdl-rex.dtsi b/arch/arm/boot/dts/imx6qdl-rex.dtsi
+index 488a640796ac..3373fd958e95 100644
+--- a/arch/arm/boot/dts/imx6qdl-rex.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-rex.dtsi
+@@ -342,7 +342,7 @@
+       pinctrl-0 = <&pinctrl_usdhc2>;
+       bus-width = <4>;
+       cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+-      wp-gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+ };
+@@ -351,6 +351,6 @@
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       bus-width = <4>;
+       cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+-      wp-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+index 3b24b12651b2..e329ca5c3322 100644
+--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+@@ -467,8 +467,8 @@
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+-      cd-gpios = <&gpio6 15 0>;
+-      wp-gpios = <&gpio1 13 0>;
++      cd-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+index e00c44f6a0df..782379320517 100644
+--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+@@ -448,8 +448,8 @@
+ &usdhc3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+-      cd-gpios = <&gpio7 0 0>;
+-      wp-gpios = <&gpio7 1 0>;
++      cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
+       vmmc-supply = <&reg_3p3v>;
+       status = "okay";
+ };
+@@ -457,7 +457,7 @@
+ &usdhc4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc4>;
+-      cd-gpios = <&gpio2 6 0>;
++      cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
+       vmmc-supply = <&reg_3p3v>;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+index a626e6dd8022..944eb81cb2b8 100644
+--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+@@ -562,8 +562,8 @@
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+       bus-width = <8>;
+-      cd-gpios = <&gpio2 2 0>;
+-      wp-gpios = <&gpio2 3 0>;
++      cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+ };
+@@ -571,8 +571,8 @@
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       bus-width = <8>;
+-      cd-gpios = <&gpio2 0 0>;
+-      wp-gpios = <&gpio2 1 0>;
++      cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/imx6qdl-tx6.dtsi
+index f02b80b41d4f..da08de324e9e 100644
+--- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi
+@@ -680,7 +680,7 @@
+       pinctrl-0 = <&pinctrl_usdhc1>;
+       bus-width = <4>;
+       no-1-8-v;
+-      cd-gpios = <&gpio7 2 0>;
++      cd-gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
+       fsl,wp-controller;
+       status = "okay";
+ };
+@@ -690,7 +690,7 @@
+       pinctrl-0 = <&pinctrl_usdhc2>;
+       bus-width = <4>;
+       no-1-8-v;
+-      cd-gpios = <&gpio7 3 0>;
++      cd-gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
+       fsl,wp-controller;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
+index 5fb091675582..9e096d811bed 100644
+--- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
+@@ -9,6 +9,8 @@
+  *
+  */
++#include <dt-bindings/gpio/gpio.h>
++
+ / {
+       regulators {
+               compatible = "simple-bus";
+@@ -250,13 +252,13 @@
+ &usdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc1>;
+-      cd-gpios = <&gpio1 2 0>;
++      cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
+       status = "okay";
+ };
+ &usdhc3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+-      cd-gpios = <&gpio3 9 0>;
++      cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
+index 945887d3fdb3..b84dff2e94ea 100644
+--- a/arch/arm/boot/dts/imx6sl-evk.dts
++++ b/arch/arm/boot/dts/imx6sl-evk.dts
+@@ -617,8 +617,8 @@
+       pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+       bus-width = <8>;
+-      cd-gpios = <&gpio4 7 0>;
+-      wp-gpios = <&gpio4 6 0>;
++      cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+ };
+@@ -627,8 +627,8 @@
+       pinctrl-0 = <&pinctrl_usdhc2>;
+       pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
+-      cd-gpios = <&gpio5 0 0>;
+-      wp-gpios = <&gpio4 29 0>;
++      cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
++      wp-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+ };
+@@ -637,6 +637,6 @@
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+-      cd-gpios = <&gpio3 22 0>;
++      cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
+       status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts
+index e3c0b63c2205..115f3fd78971 100644
+--- a/arch/arm/boot/dts/imx6sx-sabreauto.dts
++++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts
+@@ -49,7 +49,7 @@
+       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+       bus-width = <8>;
+-      cd-gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
+       wp-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
+       keep-power-in-suspend;
+       enable-sdio-wakeup;
+@@ -61,7 +61,7 @@
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc4>;
+       bus-width = <8>;
+-      cd-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
+       no-1-8-v;
+       keep-power-in-suspend;
+       enable-sdio-wakup;
+diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi b/arch/arm/boot/dts/imx6sx-sdb.dtsi
+index cef04cef3a80..ac88c3467078 100644
+--- a/arch/arm/boot/dts/imx6sx-sdb.dtsi
++++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi
+@@ -293,7 +293,7 @@
+       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+       bus-width = <8>;
+-      cd-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
+       wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
+       keep-power-in-suspend;
+       enable-sdio-wakeup;
+@@ -304,7 +304,7 @@
+ &usdhc4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc4>;
+-      cd-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>;
++      cd-gpios = <&gpio6 21 GPIO_ACTIVE_LOW>;
+       wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+ };
diff --git a/queue-4.1/ipr-enable-sis-pipe-commands-for-sis-32-devices.patch b/queue-4.1/ipr-enable-sis-pipe-commands-for-sis-32-devices.patch
new file mode 100644 (file)
index 0000000..ad3dbe2
--- /dev/null
@@ -0,0 +1,35 @@
+From e35d7f27fbd51a09a41a5439e39f22a3d102c00b Mon Sep 17 00:00:00 2001
+From: Gabriel Krisman Bertazi <krisman@linux.vnet.ibm.com>
+Date: Wed, 19 Aug 2015 11:47:06 -0300
+Subject: ipr: Enable SIS pipe commands for SIS-32 devices.
+
+From: Gabriel Krisman Bertazi <krisman@linux.vnet.ibm.com>
+
+commit e35d7f27fbd51a09a41a5439e39f22a3d102c00b upstream.
+
+Remove unnecessary check that disabled SIS pipe commands for SIS-32
+devices.  This change was sufficient to enable raw mode and send SIS
+pipe commands for a 57B3 device.
+
+Fixes: f8ee25d7d239 ("ipr: AF DASD raw mode implementation in ipr driver")
+Signed-off-by: Gabriel Krisman Bertazi <krisman@linux.vnet.ibm.com>
+Reviewed-by: Wen Xiong <wenxiong@linux.vnet.ibm.com>
+Acked-by: Brian King <brking@linux.vnet.ibm.com>
+Signed-off-by: James Bottomley <JBottomley@Odin.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/scsi/ipr.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/scsi/ipr.c
++++ b/drivers/scsi/ipr.c
+@@ -4554,7 +4554,7 @@ static ssize_t ipr_store_raw_mode(struct
+       spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
+       res = (struct ipr_resource_entry *)sdev->hostdata;
+       if (res) {
+-              if (ioa_cfg->sis64 && ipr_is_af_dasd_device(res)) {
++              if (ipr_is_af_dasd_device(res)) {
+                       res->raw_mode = simple_strtoul(buf, NULL, 10);
+                       len = strlen(buf);
+                       if (res->sdev)
diff --git a/queue-4.1/irqchip-atmel-aic5-use-per-chip-mask-caches-in-mask-unmask.patch b/queue-4.1/irqchip-atmel-aic5-use-per-chip-mask-caches-in-mask-unmask.patch
new file mode 100644 (file)
index 0000000..09bab49
--- /dev/null
@@ -0,0 +1,79 @@
+From d32dc9aa10c739363c775baf4499416b2e0dc11f Mon Sep 17 00:00:00 2001
+From: Ludovic Desroches <ludovic.desroches@atmel.com>
+Date: Mon, 21 Sep 2015 15:46:04 +0200
+Subject: irqchip/atmel-aic5: Use per chip mask caches in mask/unmask()
+
+From: Ludovic Desroches <ludovic.desroches@atmel.com>
+
+commit d32dc9aa10c739363c775baf4499416b2e0dc11f upstream.
+
+When masking/unmasking interrupts, mask_cache is updated and used later
+for suspend/resume. Unfortunately, it always was the mask_cache
+associated with the first irq chip which was updated. So when performing
+resume, only irqs 0-31 could be enabled.
+
+Fixes: b1479ebb7720 ("irqchip: atmel-aic: Add atmel AIC/AIC5 drivers")
+Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
+Cc: <sasha.levin@oracle.com>
+Cc: <linux-arm-kernel@lists.infradead.org>
+Cc: <nicolas.ferre@atmel.com>
+Cc: <alexandre.belloni@free-electrons.com>
+Cc: <boris.brezillon@free-electrons.com>
+Cc: <Wenyou.Yang@atmel.com>
+Cc: <jason@lakedaemon.net>
+Cc: <marc.zyngier@arm.com>
+Link: http://lkml.kernel.org/r/1442843173-2390-1-git-send-email-ludovic.desroches@atmel.com
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/irqchip/irq-atmel-aic5.c |   24 ++++++++++++++++--------
+ 1 file changed, 16 insertions(+), 8 deletions(-)
+
+--- a/drivers/irqchip/irq-atmel-aic5.c
++++ b/drivers/irqchip/irq-atmel-aic5.c
+@@ -88,28 +88,36 @@ static void aic5_mask(struct irq_data *d
+ {
+       struct irq_domain *domain = d->domain;
+       struct irq_domain_chip_generic *dgc = domain->gc;
+-      struct irq_chip_generic *gc = dgc->gc[0];
++      struct irq_chip_generic *bgc = dgc->gc[0];
++      struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
+-      /* Disable interrupt on AIC5 */
+-      irq_gc_lock(gc);
++      /*
++       * Disable interrupt on AIC5. We always take the lock of the
++       * first irq chip as all chips share the same registers.
++       */
++      irq_gc_lock(bgc);
+       irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR);
+       irq_reg_writel(gc, 1, AT91_AIC5_IDCR);
+       gc->mask_cache &= ~d->mask;
+-      irq_gc_unlock(gc);
++      irq_gc_unlock(bgc);
+ }
+ static void aic5_unmask(struct irq_data *d)
+ {
+       struct irq_domain *domain = d->domain;
+       struct irq_domain_chip_generic *dgc = domain->gc;
+-      struct irq_chip_generic *gc = dgc->gc[0];
++      struct irq_chip_generic *bgc = dgc->gc[0];
++      struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
+-      /* Enable interrupt on AIC5 */
+-      irq_gc_lock(gc);
++      /*
++       * Enable interrupt on AIC5. We always take the lock of the
++       * first irq chip as all chips share the same registers.
++       */
++      irq_gc_lock(bgc);
+       irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR);
+       irq_reg_writel(gc, 1, AT91_AIC5_IECR);
+       gc->mask_cache |= d->mask;
+-      irq_gc_unlock(gc);
++      irq_gc_unlock(bgc);
+ }
+ static int aic5_retrigger(struct irq_data *d)
diff --git a/queue-4.1/irqchip-gic-v3-its-add-missing-cache-flushes.patch b/queue-4.1/irqchip-gic-v3-its-add-missing-cache-flushes.patch
new file mode 100644 (file)
index 0000000..f2e4d61
--- /dev/null
@@ -0,0 +1,52 @@
+From 5a9a8915c8888b615521b17d70a4342187eae60b Mon Sep 17 00:00:00 2001
+From: Marc Zyngier <marc.zyngier@arm.com>
+Date: Sun, 13 Sep 2015 12:14:32 +0100
+Subject: irqchip/gic-v3-its: Add missing cache flushes
+
+From: Marc Zyngier <marc.zyngier@arm.com>
+
+commit 5a9a8915c8888b615521b17d70a4342187eae60b upstream.
+
+When the ITS is configured for non-cacheable transactions, make sure
+that the allocated, zeroed memory is flushed to the Point of
+Coherency, allowing the ITS to observe the zeros instead of random
+garbage (or even get its own data overwritten by zeros being evicted
+from the cache...).
+
+Fixes: 241a386c7dbb "irqchip: gicv3-its: Use non-cacheable accesses when no shareability"
+Reported-and-tested-by: Stuart Yoder <stuart.yoder@freescale.com>
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+Cc: linux-arm-kernel@lists.infradead.org
+Cc: Pavel Fedin <p.fedin@samsung.com>
+Cc: Jason Cooper <jason@lakedaemon.net>
+Link: http://lkml.kernel.org/r/1442142873-20213-3-git-send-email-marc.zyngier@arm.com
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/irqchip/irq-gic-v3-its.c |    6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/drivers/irqchip/irq-gic-v3-its.c
++++ b/drivers/irqchip/irq-gic-v3-its.c
+@@ -921,8 +921,10 @@ retry_baser:
+                        * non-cacheable as well.
+                        */
+                       shr = tmp & GITS_BASER_SHAREABILITY_MASK;
+-                      if (!shr)
++                      if (!shr) {
+                               cache = GITS_BASER_nC;
++                              __flush_dcache_area(base, alloc_size);
++                      }
+                       goto retry_baser;
+               }
+@@ -1163,6 +1165,8 @@ static struct its_device *its_create_dev
+               return NULL;
+       }
++      __flush_dcache_area(itt, sz);
++
+       dev->its = its;
+       dev->itt = itt;
+       dev->nr_ites = nr_ites;
diff --git a/queue-4.1/mmc-dw_mmc-handle-data-blocks-than-4kb-if-idmac-is-used.patch b/queue-4.1/mmc-dw_mmc-handle-data-blocks-than-4kb-if-idmac-is-used.patch
new file mode 100644 (file)
index 0000000..b223b45
--- /dev/null
@@ -0,0 +1,199 @@
+From 5959b32e3636f9bfe3f869d1e440bc4a4d660965 Mon Sep 17 00:00:00 2001
+From: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
+Date: Thu, 25 Jun 2015 11:25:07 +0300
+Subject: mmc: dw_mmc: handle data blocks > than 4kB if IDMAC is used
+
+From: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
+
+commit 5959b32e3636f9bfe3f869d1e440bc4a4d660965 upstream.
+
+As per DW MobileStorage databook "each descriptor can transfer up to 4kB
+of data in chained mode", moreover buffer size that is put in "des1" is
+limited to 13 bits, i.e. for example on attempt to
+IDMAC_SET_BUFFER1_SIZE(desc, 8192) size value that's effectively written
+will be 0.
+
+On the platform with 8kB PAGE_SIZE I see dw_mmc gets data blocks in
+SG-list of 8kB size and that leads to unpredictable behavior of the
+SD/MMC controller.
+
+In particular on write to FAT partition of SD-card the controller will
+stuck in the middle of DMA transaction.
+
+Solution to the problem is simple - we need to pass large (> 4kB) data
+buffers to the controller via multiple descriptors. And that's what
+that change does.
+
+What's interesting I did try original driver on same platform but
+configured with 4kB PAGE_SIZE and may confirm that data blocks passed
+in SG-list to dw_mmc never exeed 4kB limit - that explains why nobody
+ever faced a problem I did.
+
+Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
+Cc: Seungwon Jeon <tgih.jun@samsung.com>
+Cc: Jaehoon Chung <jh80.chung@samsung.com>
+Cc: Ulf Hansson <ulf.hansson@linaro.org>
+Cc: arc-linux-dev@synopsys.com
+Cc: linux-kernel@vger.kernel.org
+Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/dw_mmc.c |  109 +++++++++++++++++++++++++++++-----------------
+ 1 file changed, 71 insertions(+), 38 deletions(-)
+
+--- a/drivers/mmc/host/dw_mmc.c
++++ b/drivers/mmc/host/dw_mmc.c
+@@ -99,6 +99,9 @@ struct idmac_desc {
+       __le32          des3;   /* buffer 2 physical address */
+ };
++
++/* Each descriptor can transfer up to 4KB of data in chained mode */
++#define DW_MCI_DESC_DATA_LENGTH       0x1000
+ #endif /* CONFIG_MMC_DW_IDMAC */
+ static bool dw_mci_reset(struct dw_mci *host);
+@@ -462,66 +465,96 @@ static void dw_mci_idmac_complete_dma(st
+ static void dw_mci_translate_sglist(struct dw_mci *host, struct mmc_data *data,
+                                   unsigned int sg_len)
+ {
++      unsigned int desc_len;
+       int i;
+       if (host->dma_64bit_address == 1) {
+-              struct idmac_desc_64addr *desc = host->sg_cpu;
++              struct idmac_desc_64addr *desc_first, *desc_last, *desc;
++
++              desc_first = desc_last = desc = host->sg_cpu;
+-              for (i = 0; i < sg_len; i++, desc++) {
++              for (i = 0; i < sg_len; i++) {
+                       unsigned int length = sg_dma_len(&data->sg[i]);
+                       u64 mem_addr = sg_dma_address(&data->sg[i]);
+-                      /*
+-                       * Set the OWN bit and disable interrupts for this
+-                       * descriptor
+-                       */
+-                      desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC |
+-                                              IDMAC_DES0_CH;
+-                      /* Buffer length */
+-                      IDMAC_64ADDR_SET_BUFFER1_SIZE(desc, length);
+-
+-                      /* Physical address to DMA to/from */
+-                      desc->des4 = mem_addr & 0xffffffff;
+-                      desc->des5 = mem_addr >> 32;
++                      for ( ; length ; desc++) {
++                              desc_len = (length <= DW_MCI_DESC_DATA_LENGTH) ?
++                                         length : DW_MCI_DESC_DATA_LENGTH;
++
++                              length -= desc_len;
++
++                              /*
++                               * Set the OWN bit and disable interrupts
++                               * for this descriptor
++                               */
++                              desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC |
++                                                      IDMAC_DES0_CH;
++
++                              /* Buffer length */
++                              IDMAC_64ADDR_SET_BUFFER1_SIZE(desc, desc_len);
++
++                              /* Physical address to DMA to/from */
++                              desc->des4 = mem_addr & 0xffffffff;
++                              desc->des5 = mem_addr >> 32;
++
++                              /* Update physical address for the next desc */
++                              mem_addr += desc_len;
++
++                              /* Save pointer to the last descriptor */
++                              desc_last = desc;
++                      }
+               }
+               /* Set first descriptor */
+-              desc = host->sg_cpu;
+-              desc->des0 |= IDMAC_DES0_FD;
++              desc_first->des0 |= IDMAC_DES0_FD;
+               /* Set last descriptor */
+-              desc = host->sg_cpu + (i - 1) *
+-                              sizeof(struct idmac_desc_64addr);
+-              desc->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC);
+-              desc->des0 |= IDMAC_DES0_LD;
++              desc_last->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC);
++              desc_last->des0 |= IDMAC_DES0_LD;
+       } else {
+-              struct idmac_desc *desc = host->sg_cpu;
++              struct idmac_desc *desc_first, *desc_last, *desc;
++
++              desc_first = desc_last = desc = host->sg_cpu;
+-              for (i = 0; i < sg_len; i++, desc++) {
++              for (i = 0; i < sg_len; i++) {
+                       unsigned int length = sg_dma_len(&data->sg[i]);
+                       u32 mem_addr = sg_dma_address(&data->sg[i]);
+-                      /*
+-                       * Set the OWN bit and disable interrupts for this
+-                       * descriptor
+-                       */
+-                      desc->des0 = cpu_to_le32(IDMAC_DES0_OWN |
+-                                      IDMAC_DES0_DIC | IDMAC_DES0_CH);
+-                      /* Buffer length */
+-                      IDMAC_SET_BUFFER1_SIZE(desc, length);
++                      for ( ; length ; desc++) {
++                              desc_len = (length <= DW_MCI_DESC_DATA_LENGTH) ?
++                                         length : DW_MCI_DESC_DATA_LENGTH;
++
++                              length -= desc_len;
++
++                              /*
++                               * Set the OWN bit and disable interrupts
++                               * for this descriptor
++                               */
++                              desc->des0 = cpu_to_le32(IDMAC_DES0_OWN |
++                                                       IDMAC_DES0_DIC |
++                                                       IDMAC_DES0_CH);
++
++                              /* Buffer length */
++                              IDMAC_SET_BUFFER1_SIZE(desc, desc_len);
+-                      /* Physical address to DMA to/from */
+-                      desc->des2 = cpu_to_le32(mem_addr);
++                              /* Physical address to DMA to/from */
++                              desc->des2 = cpu_to_le32(mem_addr);
++
++                              /* Update physical address for the next desc */
++                              mem_addr += desc_len;
++
++                              /* Save pointer to the last descriptor */
++                              desc_last = desc;
++                      }
+               }
+               /* Set first descriptor */
+-              desc = host->sg_cpu;
+-              desc->des0 |= cpu_to_le32(IDMAC_DES0_FD);
++              desc_first->des0 |= cpu_to_le32(IDMAC_DES0_FD);
+               /* Set last descriptor */
+-              desc = host->sg_cpu + (i - 1) * sizeof(struct idmac_desc);
+-              desc->des0 &= cpu_to_le32(~(IDMAC_DES0_CH | IDMAC_DES0_DIC));
+-              desc->des0 |= cpu_to_le32(IDMAC_DES0_LD);
++              desc_last->des0 &= cpu_to_le32(~(IDMAC_DES0_CH |
++                                             IDMAC_DES0_DIC));
++              desc_last->des0 |= cpu_to_le32(IDMAC_DES0_LD);
+       }
+       wmb();
+@@ -2406,7 +2439,7 @@ static int dw_mci_init_slot(struct dw_mc
+ #ifdef CONFIG_MMC_DW_IDMAC
+               mmc->max_segs = host->ring_size;
+               mmc->max_blk_size = 65536;
+-              mmc->max_seg_size = 0x1000;
++              mmc->max_seg_size = DW_MCI_DESC_DATA_LENGTH;
+               mmc->max_req_size = mmc->max_seg_size * host->ring_size;
+               mmc->max_blk_count = mmc->max_req_size / 512;
+ #else
diff --git a/queue-4.1/mmc-sdhci-esdhc-imx-do-not-break-platform-data-boards.patch b/queue-4.1/mmc-sdhci-esdhc-imx-do-not-break-platform-data-boards.patch
new file mode 100644 (file)
index 0000000..cf9236c
--- /dev/null
@@ -0,0 +1,87 @@
+From 7ccddeb08a632c713eca0a5f13bcbfa7e6e83982 Mon Sep 17 00:00:00 2001
+From: Fabio Estevam <fabio.estevam@freescale.com>
+Date: Sat, 9 May 2015 09:57:09 -0300
+Subject: mmc: sdhci-esdhc-imx: Do not break platform data boards
+
+From: Fabio Estevam <fabio.estevam@freescale.com>
+
+commit 7ccddeb08a632c713eca0a5f13bcbfa7e6e83982 upstream.
+
+The only user of this driver that has not been converted to fully
+device tree is the i.MX35 SoC.
+
+There is a i.MX35-based board (mach-pcm043.c) that uses platform data
+to pass wp_gpio and cd_gpio information.
+
+Commit 8d86e4fcccf61ba ("mmc: sdhci-esdhc-imx: Call mmc_of_parse()")
+broke the platform data case by removing mmc_gpio_request_ro() and
+mmc_gpio_request_cd(), so restore the functionality for the non-dt
+case.
+
+Also, restore the check for ESDHC_CD_CONTROLLER so that we can still
+support the "fsl,cd-controller" property.
+
+Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci-esdhc-imx.c |   36 +++++++++++++++++++++++++++++++++++-
+ 1 file changed, 35 insertions(+), 1 deletion(-)
+
+--- a/drivers/mmc/host/sdhci-esdhc-imx.c
++++ b/drivers/mmc/host/sdhci-esdhc-imx.c
+@@ -925,6 +925,7 @@ static int sdhci_esdhc_imx_probe(struct
+       struct esdhc_platform_data *boarddata;
+       int err;
+       struct pltfm_imx_data *imx_data;
++      bool dt = true;
+       host = sdhci_pltfm_init(pdev, &sdhci_esdhc_imx_pdata, 0);
+       if (IS_ERR(host))
+@@ -1012,11 +1013,44 @@ static int sdhci_esdhc_imx_probe(struct
+               }
+               imx_data->boarddata = *((struct esdhc_platform_data *)
+                                       host->mmc->parent->platform_data);
++              dt = false;
++      }
++      /* write_protect */
++      if (boarddata->wp_type == ESDHC_WP_GPIO && !dt) {
++              err = mmc_gpio_request_ro(host->mmc, boarddata->wp_gpio);
++              if (err) {
++                      dev_err(mmc_dev(host->mmc),
++                              "failed to request write-protect gpio!\n");
++                      goto disable_clk;
++              }
++              host->mmc->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH;
+       }
+       /* card_detect */
+-      if (boarddata->cd_type == ESDHC_CD_CONTROLLER)
++      switch (boarddata->cd_type) {
++      case ESDHC_CD_GPIO:
++              if (dt)
++                      break;
++              err = mmc_gpio_request_cd(host->mmc, boarddata->cd_gpio, 0);
++              if (err) {
++                      dev_err(mmc_dev(host->mmc),
++                              "failed to request card-detect gpio!\n");
++                      goto disable_clk;
++              }
++              /* fall through */
++
++      case ESDHC_CD_CONTROLLER:
++              /* we have a working card_detect back */
+               host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
++              break;
++
++      case ESDHC_CD_PERMANENT:
++              host->mmc->caps |= MMC_CAP_NONREMOVABLE;
++              break;
++
++      case ESDHC_CD_NONE:
++              break;
++      }
+       switch (boarddata->max_bus_width) {
+       case 8:
diff --git a/queue-4.1/mmc-sdhci-esdhc-imx-fix-cd-regression-for-dt-platform.patch b/queue-4.1/mmc-sdhci-esdhc-imx-fix-cd-regression-for-dt-platform.patch
new file mode 100644 (file)
index 0000000..93e9922
--- /dev/null
@@ -0,0 +1,61 @@
+From 4800e87a2ee886c1972deb73f057d1a6541edb36 Mon Sep 17 00:00:00 2001
+From: Dong Aisheng <aisheng.dong@freescale.com>
+Date: Wed, 22 Jul 2015 20:53:05 +0800
+Subject: mmc: sdhci-esdhc-imx: fix cd regression for dt platform
+
+From: Dong Aisheng <aisheng.dong@freescale.com>
+
+commit 4800e87a2ee886c1972deb73f057d1a6541edb36 upstream.
+
+Current card detect probe process is that when driver finds a valid
+ESDHC_CD_GPIO, it will clear the quirk SDHCI_QUIRK_BROKEN_CARD_DETECTION
+which is set by default for all esdhc/usdhc controllers.
+Then host driver will know there's a valid card detect function.
+
+Commit 8d86e4fcccf6 ("mmc: sdhci-esdhc-imx: Call mmc_of_parse()")
+breaks GPIO CD function for dt platform that it will return directly
+when find ESDHC_CD_GPIO for dt platform which result in the later wrongly
+to keep SDHCI_QUIRK_BROKEN_CARD_DETECTION for all dt platforms.
+Then MMC_CAP_NEEDS_POLL will be used instead even there's a valid
+GPIO card detect.
+
+This patch adds back this function and follows the original approach to
+clear the quirk if find an valid CD GPIO for dt platforms.
+
+Fixes: 8d86e4fcccf6 ("mmc: sdhci-esdhc-imx: Call mmc_of_parse()")
+Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com>
+Reviewed-by: Johan Derycke <johan.derycke@barco.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci-esdhc-imx.c |   10 +++++++++-
+ 1 file changed, 9 insertions(+), 1 deletion(-)
+
+--- a/drivers/mmc/host/sdhci-esdhc-imx.c
++++ b/drivers/mmc/host/sdhci-esdhc-imx.c
+@@ -868,6 +868,7 @@ sdhci_esdhc_imx_probe_dt(struct platform
+                        struct esdhc_platform_data *boarddata)
+ {
+       struct device_node *np = pdev->dev.of_node;
++      int ret;
+       if (!np)
+               return -ENODEV;
+@@ -904,7 +905,14 @@ sdhci_esdhc_imx_probe_dt(struct platform
+       mmc_of_parse_voltage(np, &host->ocr_mask);
+       /* call to generic mmc_of_parse to support additional capabilities */
+-      return mmc_of_parse(host->mmc);
++      ret = mmc_of_parse(host->mmc);
++      if (ret)
++              return ret;
++
++      if (!IS_ERR_VALUE(mmc_gpio_get_cd(host->mmc)))
++              host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
++
++      return 0;
+ }
+ #else
+ static inline int
diff --git a/queue-4.1/mmc-sdhci-esdhc-imx-move-mmc_of_parse-to-the-dt-probe.patch b/queue-4.1/mmc-sdhci-esdhc-imx-move-mmc_of_parse-to-the-dt-probe.patch
new file mode 100644 (file)
index 0000000..b9d53b2
--- /dev/null
@@ -0,0 +1,44 @@
+From 15064119273735c115fba381823b0746508bae3a Mon Sep 17 00:00:00 2001
+From: Fabio Estevam <fabio.estevam@freescale.com>
+Date: Sat, 9 May 2015 09:57:08 -0300
+Subject: mmc: sdhci-esdhc-imx: Move mmc_of_parse() to the dt probe
+
+From: Fabio Estevam <fabio.estevam@freescale.com>
+
+commit 15064119273735c115fba381823b0746508bae3a upstream.
+
+mmc_of_parse() should be placed inside sdhci_esdhc_imx_probe_dt() as it
+suits only for the dt case.
+
+Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci-esdhc-imx.c |    8 ++------
+ 1 file changed, 2 insertions(+), 6 deletions(-)
+
+--- a/drivers/mmc/host/sdhci-esdhc-imx.c
++++ b/drivers/mmc/host/sdhci-esdhc-imx.c
+@@ -903,7 +903,8 @@ sdhci_esdhc_imx_probe_dt(struct platform
+       mmc_of_parse_voltage(np, &host->ocr_mask);
+-      return 0;
++      /* call to generic mmc_of_parse to support additional capabilities */
++      return mmc_of_parse(host->mmc);
+ }
+ #else
+ static inline int
+@@ -1048,11 +1049,6 @@ static int sdhci_esdhc_imx_probe(struct
+               host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
+       }
+-      /* call to generic mmc_of_parse to support additional capabilities */
+-      err = mmc_of_parse(host->mmc);
+-      if (err)
+-              goto disable_clk;
+-
+       err = sdhci_add_host(host);
+       if (err)
+               goto disable_clk;
diff --git a/queue-4.1/mtd-nand-sunxi-fix-oob-handling-in-write_xxx-functions.patch b/queue-4.1/mtd-nand-sunxi-fix-oob-handling-in-write_xxx-functions.patch
new file mode 100644 (file)
index 0000000..0eab30c
--- /dev/null
@@ -0,0 +1,77 @@
+From 03a0e8a7c5ea29b5c4e72dfd64900b47a8fb6f2d Mon Sep 17 00:00:00 2001
+From: Boris BREZILLON <boris.brezillon@free-electrons.com>
+Date: Mon, 14 Sep 2015 10:41:03 +0200
+Subject: mtd: nand: sunxi: fix OOB handling in ->write_xxx() functions
+
+From: Boris BREZILLON <boris.brezillon@free-electrons.com>
+
+commit 03a0e8a7c5ea29b5c4e72dfd64900b47a8fb6f2d upstream.
+
+The USER_DATA register cannot be accessed using byte accessors on A13
+SoCs, thus triggering a bug when using memcpy_toio on this register.
+Declare an helper macros to convert an OOB buffer into a suitable
+USER_DATA value and vice-versa.
+
+This patch also fixes an error in the oob_required logic (some OOB data
+are not written even if the user required it) by removing the
+oob_required condition, which is perfectly valid since the core already
+fill ->oob_poi with FFs when oob_required is false.
+
+Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
+Fixes: 1fef62c1423b ("mtd: nand: add sunxi NAND flash controller support")
+Signed-off-by: Brian Norris <computersforpeace@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mtd/nand/sunxi_nand.c |   26 +++++++++-----------------
+ 1 file changed, 9 insertions(+), 17 deletions(-)
+
+--- a/drivers/mtd/nand/sunxi_nand.c
++++ b/drivers/mtd/nand/sunxi_nand.c
+@@ -138,6 +138,10 @@
+ #define NFC_ECC_MODE          GENMASK(15, 12)
+ #define NFC_RANDOM_SEED               GENMASK(30, 16)
++/* NFC_USER_DATA helper macros */
++#define NFC_BUF_TO_USER_DATA(buf)     ((buf)[0] | ((buf)[1] << 8) | \
++                                      ((buf)[2] << 16) | ((buf)[3] << 24))
++
+ #define NFC_DEFAULT_TIMEOUT_MS        1000
+ #define NFC_SRAM_SIZE         1024
+@@ -632,15 +636,9 @@ static int sunxi_nfc_hw_ecc_write_page(s
+               offset = layout->eccpos[i * ecc->bytes] - 4 + mtd->writesize;
+               /* Fill OOB data in */
+-              if (oob_required) {
+-                      tmp = 0xffffffff;
+-                      memcpy_toio(nfc->regs + NFC_REG_USER_DATA_BASE, &tmp,
+-                                  4);
+-              } else {
+-                      memcpy_toio(nfc->regs + NFC_REG_USER_DATA_BASE,
+-                                  chip->oob_poi + offset - mtd->writesize,
+-                                  4);
+-              }
++              writel(NFC_BUF_TO_USER_DATA(chip->oob_poi +
++                                          layout->oobfree[i].offset),
++                     nfc->regs + NFC_REG_USER_DATA_BASE);
+               chip->cmdfunc(mtd, NAND_CMD_RNDIN, offset, -1);
+@@ -770,14 +768,8 @@ static int sunxi_nfc_hw_syndrome_ecc_wri
+               offset += ecc->size;
+               /* Fill OOB data in */
+-              if (oob_required) {
+-                      tmp = 0xffffffff;
+-                      memcpy_toio(nfc->regs + NFC_REG_USER_DATA_BASE, &tmp,
+-                                  4);
+-              } else {
+-                      memcpy_toio(nfc->regs + NFC_REG_USER_DATA_BASE, oob,
+-                                  4);
+-              }
++              writel(NFC_BUF_TO_USER_DATA(oob),
++                     nfc->regs + NFC_REG_USER_DATA_BASE);
+               tmp = NFC_DATA_TRANS | NFC_DATA_SWAP_METHOD | NFC_ACCESS_DIR |
+                     (1 << 30);
diff --git a/queue-4.1/mtd-nand-sunxi-fix-sunxi_nand_chips_cleanup.patch b/queue-4.1/mtd-nand-sunxi-fix-sunxi_nand_chips_cleanup.patch
new file mode 100644 (file)
index 0000000..4082e2b
--- /dev/null
@@ -0,0 +1,33 @@
+From 8e375ccda31ccc73b087134e263c48d2114534f4 Mon Sep 17 00:00:00 2001
+From: Boris BREZILLON <boris.brezillon@free-electrons.com>
+Date: Sun, 13 Sep 2015 18:14:43 +0200
+Subject: mtd: nand: sunxi: fix sunxi_nand_chips_cleanup()
+
+From: Boris BREZILLON <boris.brezillon@free-electrons.com>
+
+commit 8e375ccda31ccc73b087134e263c48d2114534f4 upstream.
+
+The sunxi_nand_chips_cleanup() function is missing a call to list_del()
+which generates a double free error.
+
+Reported-by: Priit Laes <plaes@plaes.org>
+Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
+Fixes: 1fef62c1423b ("mtd: nand: add sunxi NAND flash controller support")
+Tested-by: Priit Laes <plaes@plaes.org>
+Signed-off-by: Brian Norris <computersforpeace@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mtd/nand/sunxi_nand.c |    1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/mtd/nand/sunxi_nand.c
++++ b/drivers/mtd/nand/sunxi_nand.c
+@@ -1312,6 +1312,7 @@ static void sunxi_nand_chips_cleanup(str
+                                       node);
+               nand_release(&chip->mtd);
+               sunxi_nand_ecc_cleanup(&chip->nand.ecc);
++              list_del(&chip->node);
+       }
+ }
diff --git a/queue-4.1/mtd-pxa3xx_nand-add-a-default-chunk-size.patch b/queue-4.1/mtd-pxa3xx_nand-add-a-default-chunk-size.patch
new file mode 100644 (file)
index 0000000..cbccf08
--- /dev/null
@@ -0,0 +1,41 @@
+From bc3e00f04cc1fe033a289c2fc2e5c73c0168d360 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Antoine=20T=C3=A9nart?= <antoine.tenart@free-electrons.com>
+Date: Tue, 18 Aug 2015 10:59:10 +0200
+Subject: mtd: pxa3xx_nand: add a default chunk size
+
+From: =?UTF-8?q?Antoine=20T=C3=A9nart?= <antoine.tenart@free-electrons.com>
+
+commit bc3e00f04cc1fe033a289c2fc2e5c73c0168d360 upstream.
+
+When keeping the configuration set by the bootloader (by using
+the marvell,nand-keep-config property), the pxa3xx_nand_detect_config()
+function is called and set the chunk size to 512 as a default value if
+NDCR_PAGE_SZ is not set.
+
+In the other case, when not keeping the bootloader configuration, no
+chunk size is set. Fix this by adding a default chunk size of 512.
+
+Fixes: 70ed85232a93 ("mtd: nand: pxa3xx: Introduce multiple page I/O
+support")
+
+Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
+Acked-by: Robert Jarzmik <robert.jarzmik@free>
+Signed-off-by: Brian Norris <computersforpeace@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mtd/nand/pxa3xx_nand.c |    3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/mtd/nand/pxa3xx_nand.c
++++ b/drivers/mtd/nand/pxa3xx_nand.c
+@@ -1475,6 +1475,9 @@ static int pxa3xx_nand_scan(struct mtd_i
+       if (pdata->keep_config && !pxa3xx_nand_detect_config(info))
+               goto KEEP_CONFIG;
++      /* Set a default chunk size */
++      info->chunk_size = 512;
++
+       ret = pxa3xx_nand_sensing(info);
+       if (ret) {
+               dev_info(&info->pdev->dev, "There is no chip on cs %d!\n",
diff --git a/queue-4.1/pcmcia-sa11x0-fix-missing-clk_put-in-sa11x0-socket-drivers.patch b/queue-4.1/pcmcia-sa11x0-fix-missing-clk_put-in-sa11x0-socket-drivers.patch
new file mode 100644 (file)
index 0000000..4a833d0
--- /dev/null
@@ -0,0 +1,50 @@
+From 72010aca55264cfe6516a955066c846d3885b0c6 Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@arm.linux.org.uk>
+Date: Thu, 26 Mar 2015 10:22:20 +0000
+Subject: pcmcia: sa11x0: fix missing clk_put() in sa11x0 socket drivers
+
+From: Russell King <rmk+kernel@arm.linux.org.uk>
+
+commit 72010aca55264cfe6516a955066c846d3885b0c6 upstream.
+
+Fix the lack of clk_put() in sa11xx_base.c's error cleanup paths by
+converting the driver to the devm_* API.
+
+Fixes: 86d88bfca475 ("ARM: 8247/2: pcmcia: sa1100: make use of device clock")
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/pcmcia/sa1100_generic.c |    1 -
+ drivers/pcmcia/sa11xx_base.c    |    3 +--
+ 2 files changed, 1 insertion(+), 3 deletions(-)
+
+--- a/drivers/pcmcia/sa1100_generic.c
++++ b/drivers/pcmcia/sa1100_generic.c
+@@ -93,7 +93,6 @@ static int sa11x0_drv_pcmcia_remove(stru
+       for (i = 0; i < sinfo->nskt; i++)
+               soc_pcmcia_remove_one(&sinfo->skt[i]);
+-      clk_put(sinfo->clk);
+       kfree(sinfo);
+       return 0;
+ }
+--- a/drivers/pcmcia/sa11xx_base.c
++++ b/drivers/pcmcia/sa11xx_base.c
+@@ -222,7 +222,7 @@ int sa11xx_drv_pcmcia_probe(struct devic
+       int i, ret = 0;
+       struct clk *clk;
+-      clk = clk_get(dev, NULL);
++      clk = devm_clk_get(dev, NULL);
+       if (IS_ERR(clk))
+               return PTR_ERR(clk);
+@@ -251,7 +251,6 @@ int sa11xx_drv_pcmcia_probe(struct devic
+       if (ret) {
+               while (--i >= 0)
+                       soc_pcmcia_remove_one(&sinfo->skt[i]);
+-              clk_put(clk);
+               kfree(sinfo);
+       } else {
+               dev_set_drvdata(dev, sinfo);
diff --git a/queue-4.1/pm-avs-rockchip-io-depend-on-config_power_avs.patch b/queue-4.1/pm-avs-rockchip-io-depend-on-config_power_avs.patch
new file mode 100644 (file)
index 0000000..22bf7a6
--- /dev/null
@@ -0,0 +1,38 @@
+From 28c1f1628ee4b163e615eefe1b6463e3d229a873 Mon Sep 17 00:00:00 2001
+From: Heiko Stuebner <heiko@sntech.de>
+Date: Tue, 4 Aug 2015 21:36:12 +0200
+Subject: PM / AVS: rockchip-io: depend on CONFIG_POWER_AVS
+
+From: Heiko Stuebner <heiko@sntech.de>
+
+commit 28c1f1628ee4b163e615eefe1b6463e3d229a873 upstream.
+
+The rockchip io-domain driver currently only depends on ARCH_ROCKCHIP
+itself. This makes it possible to select the power-domain driver, but
+not the POWER_AVS class and results in the iodomain-driver not getting
+build in this case.
+
+So add the additional dependency, which also results in the driver
+config option now being placed nicely into the AVS submenu.
+
+Fixes: 662a958638bd ("PM / AVS: rockchip-io: add driver handling Rockchip io domains")
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+Acked-by: Kevin Hilman <khilman@linaro.org>
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/power/avs/Kconfig |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/power/avs/Kconfig
++++ b/drivers/power/avs/Kconfig
+@@ -13,7 +13,7 @@ menuconfig POWER_AVS
+ config ROCKCHIP_IODOMAIN
+         tristate "Rockchip IO domain support"
+-        depends on ARCH_ROCKCHIP && OF
++        depends on POWER_AVS && ARCH_ROCKCHIP && OF
+         help
+           Say y here to enable support io domains on Rockchip SoCs. It is
+           necessary for the io domain setting of the SoC to match the
diff --git a/queue-4.1/regmap-debugfs-don-t-bother-actually-printing-when-calculating-max-length.patch b/queue-4.1/regmap-debugfs-don-t-bother-actually-printing-when-calculating-max-length.patch
new file mode 100644 (file)
index 0000000..7bbb89b
--- /dev/null
@@ -0,0 +1,35 @@
+From 176fc2d5770a0990eebff903ba680d2edd32e718 Mon Sep 17 00:00:00 2001
+From: Mark Brown <broonie@kernel.org>
+Date: Sat, 19 Sep 2015 07:12:34 -0700
+Subject: regmap: debugfs: Don't bother actually printing when calculating max length
+
+From: Mark Brown <broonie@kernel.org>
+
+commit 176fc2d5770a0990eebff903ba680d2edd32e718 upstream.
+
+The in kernel snprintf() will conveniently return the actual length of
+the printed string even if not given an output beffer at all so just do
+that rather than relying on the user to pass in a suitable buffer,
+ensuring that we don't need to worry if the buffer was truncated due to
+the size of the buffer passed in.
+
+Reported-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/base/regmap/regmap-debugfs.c |    3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+--- a/drivers/base/regmap/regmap-debugfs.c
++++ b/drivers/base/regmap/regmap-debugfs.c
+@@ -32,8 +32,7 @@ static DEFINE_MUTEX(regmap_debugfs_early
+ /* Calculate the length of a fixed format  */
+ static size_t regmap_calc_reg_len(int max_val, char *buf, size_t buf_size)
+ {
+-      snprintf(buf, buf_size, "%x", max_val);
+-      return strlen(buf);
++      return snprintf(NULL, 0, "%x", max_val);
+ }
+ static ssize_t regmap_name_read_file(struct file *file,
diff --git a/queue-4.1/regmap-debugfs-ensure-we-don-t-underflow-when-printing-access-masks.patch b/queue-4.1/regmap-debugfs-ensure-we-don-t-underflow-when-printing-access-masks.patch
new file mode 100644 (file)
index 0000000..95a6905
--- /dev/null
@@ -0,0 +1,34 @@
+From b763ec17ac762470eec5be8ebcc43e4f8b2c2b82 Mon Sep 17 00:00:00 2001
+From: Mark Brown <broonie@kernel.org>
+Date: Sat, 19 Sep 2015 07:00:18 -0700
+Subject: regmap: debugfs: Ensure we don't underflow when printing access masks
+
+From: Mark Brown <broonie@kernel.org>
+
+commit b763ec17ac762470eec5be8ebcc43e4f8b2c2b82 upstream.
+
+If a read is attempted which is smaller than the line length then we may
+underflow the subtraction we're doing with the unsigned size_t type so
+move some of the calculation to be additions on the right hand side
+instead in order to avoid this.
+
+Reported-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/base/regmap/regmap-debugfs.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/base/regmap/regmap-debugfs.c
++++ b/drivers/base/regmap/regmap-debugfs.c
+@@ -432,7 +432,7 @@ static ssize_t regmap_access_read_file(s
+               /* If we're in the region the user is trying to read */
+               if (p >= *ppos) {
+                       /* ...but not beyond it */
+-                      if (buf_pos >= count - 1 - tot_len)
++                      if (buf_pos + tot_len + 1 >= count)
+                               break;
+                       /* Format the register */
diff --git a/queue-4.1/security-fix-typo-in-security_task_prctl.patch b/queue-4.1/security-fix-typo-in-security_task_prctl.patch
new file mode 100644 (file)
index 0000000..a30ccb5
--- /dev/null
@@ -0,0 +1,29 @@
+From b7f76ea2ef6739ee484a165ffbac98deb855d3d3 Mon Sep 17 00:00:00 2001
+From: Jann Horn <jann@thejh.net>
+Date: Fri, 18 Sep 2015 23:41:23 +0200
+Subject: security: fix typo in security_task_prctl
+
+From: Jann Horn <jann@thejh.net>
+
+commit b7f76ea2ef6739ee484a165ffbac98deb855d3d3 upstream.
+
+Signed-off-by: Jann Horn <jann@thejh.net>
+Reviewed-by: Andy Lutomirski <luto@kernel.org>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ include/linux/security.h |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/include/linux/security.h
++++ b/include/linux/security.h
+@@ -2527,7 +2527,7 @@ static inline int security_task_prctl(in
+                                     unsigned long arg4,
+                                     unsigned long arg5)
+ {
+-      return cap_task_prctl(option, arg2, arg3, arg3, arg5);
++      return cap_task_prctl(option, arg2, arg3, arg4, arg5);
+ }
+ static inline void security_task_to_inode(struct task_struct *p, struct inode *inode)
index 21b2d79dc7f6ea32ff52d750202bfb3d48afbd8c..65ce3667560763a4cf89bd76cdf6d337b034d28c 100644 (file)
@@ -125,3 +125,27 @@ fbdev-select-versatile-helpers-for-the-integrator.patch
 batman-adv-fix-kernel-crash-due-to-missing-null-checks.patch
 batman-adv-protect-tt_local_entry-from-concurrent-delete-events.patch
 batman-adv-make-dat-capability-changes-atomic.patch
+mmc-dw_mmc-handle-data-blocks-than-4kb-if-idmac-is-used.patch
+mmc-sdhci-esdhc-imx-move-mmc_of_parse-to-the-dt-probe.patch
+mmc-sdhci-esdhc-imx-do-not-break-platform-data-boards.patch
+mmc-sdhci-esdhc-imx-fix-cd-regression-for-dt-platform.patch
+dts-imx51-fix-sd-card-gpio-polarity-specified-in-device-tree.patch
+dts-imx53-fix-sd-card-gpio-polarity-specified-in-device-tree.patch
+dts-imx25-fix-sd-card-gpio-polarity-specified-in-device-tree.patch
+usb-chipidea-imx-fix-a-typo-for-imx6sx.patch
+cifs-use-server-timestamp-for-ntlmv2-authentication.patch
+irqchip-atmel-aic5-use-per-chip-mask-caches-in-mask-unmask.patch
+irqchip-gic-v3-its-add-missing-cache-flushes.patch
+docs-update-howto-for-3.x-4.x-versioning.patch
+mtd-pxa3xx_nand-add-a-default-chunk-size.patch
+mtd-nand-sunxi-fix-sunxi_nand_chips_cleanup.patch
+mtd-nand-sunxi-fix-oob-handling-in-write_xxx-functions.patch
+pm-avs-rockchip-io-depend-on-config_power_avs.patch
+device-property-fix-potential-null-pointer-dereference.patch
+ath10k-reject-11b-tx-fragmentation-configuration.patch
+pcmcia-sa11x0-fix-missing-clk_put-in-sa11x0-socket-drivers.patch
+ipr-enable-sis-pipe-commands-for-sis-32-devices.patch
+regmap-debugfs-ensure-we-don-t-underflow-when-printing-access-masks.patch
+regmap-debugfs-don-t-bother-actually-printing-when-calculating-max-length.patch
+security-fix-typo-in-security_task_prctl.patch
+dts-imx6-fix-sd-card-gpio-polarity-specified-in-device-tree.patch
diff --git a/queue-4.1/usb-chipidea-imx-fix-a-typo-for-imx6sx.patch b/queue-4.1/usb-chipidea-imx-fix-a-typo-for-imx6sx.patch
new file mode 100644 (file)
index 0000000..4a1c731
--- /dev/null
@@ -0,0 +1,31 @@
+From 8315b77d72c5f0b18ceb513303d845e73166133c Mon Sep 17 00:00:00 2001
+From: Li Jun <jun.li@freescale.com>
+Date: Wed, 16 Sep 2015 14:46:32 +0800
+Subject: usb: chipidea: imx: fix a typo for imx6sx
+
+From: Li Jun <jun.li@freescale.com>
+
+commit 8315b77d72c5f0b18ceb513303d845e73166133c upstream.
+
+Use imx6sx instead of imx6sl's platform flags for imx6sx.
+
+Fixes: e14db48dfcf3 ("usb: chipidea: imx: add runtime power management support")
+Signed-off-by: Li Jun <jun.li@freescale.com>
+Signed-off-by: Peter Chen <peter.chen@freescale.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/usb/chipidea/ci_hdrc_imx.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/usb/chipidea/ci_hdrc_imx.c
++++ b/drivers/usb/chipidea/ci_hdrc_imx.c
+@@ -56,7 +56,7 @@ static const struct of_device_id ci_hdrc
+       { .compatible = "fsl,imx27-usb", .data = &imx27_usb_data},
+       { .compatible = "fsl,imx6q-usb", .data = &imx6q_usb_data},
+       { .compatible = "fsl,imx6sl-usb", .data = &imx6sl_usb_data},
+-      { .compatible = "fsl,imx6sx-usb", .data = &imx6sl_usb_data},
++      { .compatible = "fsl,imx6sx-usb", .data = &imx6sx_usb_data},
+       { /* sentinel */ }
+ };
+ MODULE_DEVICE_TABLE(of, ci_hdrc_imx_dt_ids);