--- /dev/null
+From b11111cbc1ab3651f22ed09cb44f538eb8b669b5 Mon Sep 17 00:00:00 2001
+From: Jerome Brunet <jbrunet@baylibre.com>
+Date: Thu, 8 Nov 2018 10:31:23 +0100
+Subject: clk: meson: axg: mark fdiv2 and fdiv3 as critical
+
+[ Upstream commit d6ee1e7e9004d3d246cdfa14196989e0a9466c16 ]
+
+Similar to gxbb and gxl platforms, axg SCPI Cortex-M co-processor
+uses the fdiv2 and fdiv3 to, among other things, provide the cpu
+clock.
+
+Until clock hand-off mechanism makes its way to CCF and the generic
+SCPI claims platform specific clocks, these clocks must be marked as
+critical to make sure they are never disabled when needed by the
+co-processor.
+
+Fixes: 05f814402d61 ("clk: meson: add fdiv clock gates")
+Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
+Acked-by: Neil Armstrong <narmstrong@baylibre.com>
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/clk/meson/axg.c | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
+index bd4dbc696b88..cfd26fd7e404 100644
+--- a/drivers/clk/meson/axg.c
++++ b/drivers/clk/meson/axg.c
+@@ -320,6 +320,7 @@ static struct clk_regmap axg_fclk_div2 = {
+ .ops = &clk_regmap_gate_ops,
+ .parent_names = (const char *[]){ "fclk_div2_div" },
+ .num_parents = 1,
++ .flags = CLK_IS_CRITICAL,
+ },
+ };
+
+@@ -344,6 +345,18 @@ static struct clk_regmap axg_fclk_div3 = {
+ .ops = &clk_regmap_gate_ops,
+ .parent_names = (const char *[]){ "fclk_div3_div" },
+ .num_parents = 1,
++ /*
++ * FIXME:
++ * This clock, as fdiv2, is used by the SCPI FW and is required
++ * by the platform to operate correctly.
++ * Until the following condition are met, we need this clock to
++ * be marked as critical:
++ * a) The SCPI generic driver claims and enable all the clocks
++ * it needs
++ * b) CCF has a clock hand-off mechanism to make the sure the
++ * clock stays on until the proper driver comes along
++ */
++ .flags = CLK_IS_CRITICAL,
+ },
+ };
+
+--
+2.17.1
+
arm64-dts-stratix10-support-ethernet-jumbo-frame.patch
arm64-dts-stratix10-fix-multicast-filtering.patch
clk-meson-gxbb-set-fclk_div3-as-clk_is_critical.patch
+clk-meson-axg-mark-fdiv2-and-fdiv3-as-critical.patch
--- /dev/null
+From 32347156e41a29ddef5cecf4c61b65b28e206d88 Mon Sep 17 00:00:00 2001
+From: Jerome Brunet <jbrunet@baylibre.com>
+Date: Thu, 8 Nov 2018 10:31:23 +0100
+Subject: clk: meson: axg: mark fdiv2 and fdiv3 as critical
+
+[ Upstream commit d6ee1e7e9004d3d246cdfa14196989e0a9466c16 ]
+
+Similar to gxbb and gxl platforms, axg SCPI Cortex-M co-processor
+uses the fdiv2 and fdiv3 to, among other things, provide the cpu
+clock.
+
+Until clock hand-off mechanism makes its way to CCF and the generic
+SCPI claims platform specific clocks, these clocks must be marked as
+critical to make sure they are never disabled when needed by the
+co-processor.
+
+Fixes: 05f814402d61 ("clk: meson: add fdiv clock gates")
+Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
+Acked-by: Neil Armstrong <narmstrong@baylibre.com>
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/clk/meson/axg.c | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
+index 00ce62ad6416..8cf74fc423e6 100644
+--- a/drivers/clk/meson/axg.c
++++ b/drivers/clk/meson/axg.c
+@@ -319,6 +319,7 @@ static struct clk_regmap axg_fclk_div2 = {
+ .ops = &clk_regmap_gate_ops,
+ .parent_names = (const char *[]){ "fclk_div2_div" },
+ .num_parents = 1,
++ .flags = CLK_IS_CRITICAL,
+ },
+ };
+
+@@ -343,6 +344,18 @@ static struct clk_regmap axg_fclk_div3 = {
+ .ops = &clk_regmap_gate_ops,
+ .parent_names = (const char *[]){ "fclk_div3_div" },
+ .num_parents = 1,
++ /*
++ * FIXME:
++ * This clock, as fdiv2, is used by the SCPI FW and is required
++ * by the platform to operate correctly.
++ * Until the following condition are met, we need this clock to
++ * be marked as critical:
++ * a) The SCPI generic driver claims and enable all the clocks
++ * it needs
++ * b) CCF has a clock hand-off mechanism to make the sure the
++ * clock stays on until the proper driver comes along
++ */
++ .flags = CLK_IS_CRITICAL,
+ },
+ };
+
+--
+2.17.1
+
arm64-dts-stratix10-support-ethernet-jumbo-frame.patch
arm64-dts-stratix10-fix-multicast-filtering.patch
clk-meson-gxbb-set-fclk_div3-as-clk_is_critical.patch
+clk-meson-axg-mark-fdiv2-and-fdiv3-as-critical.patch